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Date:   Mon, 29 Jan 2018 23:10:59 -0200
From:   Eduardo Habkost <ehabkost@redhat.com>
To:     Jim Mattson <jmattson@google.com>
Cc:     Andi Kleen <ak@linux.intel.com>, David Dunn <ddunn@vmware.com>,
        Arjan van de Ven <arjan@linux.intel.com>,
        KarimAllah Ahmed <karahmed@amazon.de>,
        "Wilson, Matt" <msw@amazon.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Andrea Arcangeli <aarcange@redhat.com>,
        Andy Lutomirski <luto@kernel.org>,
        Ashok Raj <ashok.raj@intel.com>,
        Asit Mallick <asit.k.mallick@intel.com>,
        Borislav Petkov <bp@suse.de>,
        Dan Williams <dan.j.williams@intel.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        "H . Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
        Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>,
        Joerg Roedel <joro@8bytes.org>,
        Jun Nakajima <jun.nakajima@intel.com>,
        Laura Abbott <labbott@redhat.com>,
        Linus Torvalds <torvalds@linux-foundation.org>,
        Masami Hiramatsu <mhiramat@kernel.org>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Radim =?utf-8?B?S3LEjW3DocWZ?= <rkrcmar@redhat.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Tim Chen <tim.c.chen@linux.intel.com>,
        Tom Lendacky <thomas.lendacky@amd.com>,
        "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
        "x86@kernel.org" <x86@kernel.org>,
        "Dr. David Alan Gilbert" <dgilbert@redhat.com>,
        Fred Jacobs <fjacobs@vmware.com>,
        David Woodhouse <dwmw2@infradead.org>
Subject: Re: [RFC,05/10] x86/speculation: Add basic IBRS support
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On Mon, Jan 29, 2018 at 02:49:51PM -0800, Jim Mattson wrote:
> And if we expect to introduce Cascade Lake into the pool in the
> future, we use a Cascade Lake model number?
> 
> It sounds like you are suggesting that we set the model number to the
> highest model number that will ever be introduced into the pool, at
> any time in the future. That approach would also fail the
> 'is_skylake_era()' test. (Not to mention that we have no idea what
> Intel's highest compatible model number will be.)

Exactly, that's why virtualization and live-migration break the
model of just checking f/m/s/microcode: the guest doesn't need to
work around bugs that are present in the current host, but the
set of bugs that could appear on any future host it can run on.

> 
> On Mon, Jan 29, 2018 at 2:41 PM, Andi Kleen <ak@linux.intel.com> wrote:
> >> Even if we expose bit to indicate that FMS matches the underlying host, when does the guest know to query that?  The VM can be moved at any point in time, including after the guest asks if FMS matches host.
> >
> > There's no way to enable these mitigations later, so if you always
> > have to enable the super set of all the mitigations for all the hosts you
> > might be migrating too.
> >
> > As of currently that means if you want to ever migrate to Skylake you should
> > set the Skylake model number and you're good.
> >
> > -Andi

-- 
Eduardo