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[209.132.180.67]) by mx.google.com with ESMTP id f19si1861190pgn.589.2018.01.29.19.32.16; Mon, 29 Jan 2018 19:32:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=huWBGZvd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752620AbeA3Dbu (ORCPT + 99 others); Mon, 29 Jan 2018 22:31:50 -0500 Received: from mail-pf0-f175.google.com ([209.85.192.175]:43614 "EHLO mail-pf0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752258AbeA3Dbs (ORCPT ); Mon, 29 Jan 2018 22:31:48 -0500 Received: by mail-pf0-f175.google.com with SMTP id y26so7447615pfi.10; Mon, 29 Jan 2018 19:31:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=mO3eQK55qQE0tFEcZH2+dOqbnaJ9RV1zeA8ClI2LT6w=; b=huWBGZvdbsD9X+82+4OGrLshgnzknStLxRq0BxWiELogJchTQn1dLQE5Bp7wk//LsA es+zOkZ6hGVIPugh3oRCUrOX/iA8NlKpuiAkbZCXh4nvsZ4KGhBg9x8jvzXCfOhi5fo/ JG3rDh5SZRFkDLH2iMEZCNcIlnJa2QQXyjH3yNHta7ilgt3OgtGhAk8THUaAIMv/PRc6 9wBj7ZQW90+EmENEqdFPCG9Tf3FaTgdo0XVs5hu5Kc4DNzjX7x3Z71vy5OwTPaqlqRWo fuB69XWL8AmzMSRedQwT6rbvH3NUIEKV3UDHijO/VPzF9UyX+ay+57p+nS3mRl47JFqt v9Jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:from:to:cc:subject:message-id :references:mime-version:content-disposition :content-transfer-encoding:in-reply-to:user-agent; bh=mO3eQK55qQE0tFEcZH2+dOqbnaJ9RV1zeA8ClI2LT6w=; b=VPD0Beu7Je5Oda8zBbMycoc8DcRUEpz336VejCv8+F0/97bbaWuPe23oljTwN9mLgY H8oqaOXdBwOuSCkpszgjzsZ1Z/O0PWjnxnsOvfhfT/jEfYzGiLeuTL12w1yeV8WrXgCo iyFgvGTJdB5bgEeCNd5D0j3gh381HczKfvo3C7mdr4rJkz01ih0UHplomSHVvKTjrpmq WZjQ2+s22Oeh6FueExmvBJ9pQPNJiWXp1zrzY7HiqXuIXW20d8qECp9OieItSu4QIvfu EtzC4fJETorYYpXhpx+3XBUoBmGa96mJB/mTBPC8a29o50gA+OOfWvBukim+WsDHyIoN rDRw== X-Gm-Message-State: AKwxyteKSoJzP/rz8kjnceoutyd6C3sIl5Fk2bHNSMiAHIkiVDNxwZ7J GN+8QqacIp4o+fooequAEvE= X-Received: by 10.101.101.68 with SMTP id a4mr22690860pgw.368.1517283107818; Mon, 29 Jan 2018 19:31:47 -0800 (PST) Received: from pi.iht.com.au ([203.87.124.230]) by smtp.gmail.com with ESMTPSA id e26sm12173641pfi.76.2018.01.29.19.31.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Jan 2018 19:31:47 -0800 (PST) X-Google-Original-Sender: Received: from johan by pi.iht.com.au with local (Exim 4.89) (envelope-from ) id 1egMdP-0008Rn-CF; Tue, 30 Jan 2018 14:30:59 +1100 Date: Tue, 30 Jan 2018 14:30:59 +1100 From: Johan Hovold To: "Ji-Ze Hong (Peter Hong)" Cc: Andy Shevchenko , Johan Hovold , Greg Kroah-Hartman , USB , Linux Kernel Mailing List , Peter H , "Ji-Ze Hong (Peter Hong)" Subject: Re: [PATCH 2/5] USB: serial: f81232: add high baud rate support Message-ID: <20180130033059.GA3434@localhost> References: <1516607927-8887-1-git-send-email-hpeter+linux_kernel@gmail.com> <1516607927-8887-2-git-send-email-hpeter+linux_kernel@gmail.com> <7d8c1ff5-06fa-28f3-c5e8-3211497a6b17@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <7d8c1ff5-06fa-28f3-c5e8-3211497a6b17@gmail.com> User-Agent: Mutt/1.7.2 (2016-11-26) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 23, 2018 at 10:08:24AM +0800, Ji-Ze Hong (Peter Hong) wrote: > Hi Andy, > > Andy Shevchenko 於 2018/1/22 下午 10:55 寫道: > > On Mon, Jan 22, 2018 at 9:58 AM, Ji-Ze Hong (Peter Hong) > > wrote: > >> The F81232 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates > >> can be up to 1.5Mbits with 24MHz. > >> > >> F81232 Clock registers (106h) > >> > >> Bit1-0: Clock source selector > >> 00: 1.846MHz. > >> 01: 18.46MHz. > >> 10: 24MHz. > >> 11: 14.77MHz. > > > > Hmm... Why not to provide a proper clk driver (based on table variant > > of clk-divider) and use it here? > > It seems too complex to use clock framework in this driver. > What do you think about this, Johan ? Yeah, you don't need to implement a clk driver for this. If anyone thinks that would simplify things, I'd be happy to consider it as a follow-on patch. Thanks, Johan