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[209.132.180.67]) by mx.google.com with ESMTP id s66si1112501pfe.356.2018.01.30.03.19.29; Tue, 30 Jan 2018 03:19:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751687AbeA3LSy (ORCPT + 99 others); Tue, 30 Jan 2018 06:18:54 -0500 Received: from mail.skyhub.de ([5.9.137.197]:50414 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751257AbeA3LSx (ORCPT ); Tue, 30 Jan 2018 06:18:53 -0500 X-Virus-Scanned: Nedap ESD1 at mail.skyhub.de Received: from mail.skyhub.de ([127.0.0.1]) by localhost (blast.alien8.de [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id faNUIzg-_S7U; Tue, 30 Jan 2018 12:18:52 +0100 (CET) Received: from pd.tnic (p200300EC2BCF0F005D4DFBFD0E3B986B.dip0.t-ipconnect.de [IPv6:2003:ec:2bcf:f00:5d4d:fbfd:e3b:986b]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 62B361EC00A7; Tue, 30 Jan 2018 12:18:52 +0100 (CET) Date: Tue, 30 Jan 2018 12:18:48 +0100 From: Borislav Petkov To: David Woodhouse Cc: arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org, linux-kernel@vger.kernel.org, tim.c.chen@linux.intel.com, peterz@infradead.org, pbonzini@redhat.com, ak@linux.intel.com, torvalds@linux-foundation.org, gregkh@linux-foundation.org Subject: Re: [PATCH] x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature bits on Intel Message-ID: <20180130111848.zjv2dngfzcz35lyt@pd.tnic> References: <1517269773-16750-1-git-send-email-dwmw@amazon.co.uk> <20180130105814.m5zd43dyx2o2ius2@pd.tnic> <1517310230.18619.86.camel@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1517310230.18619.86.camel@infradead.org> User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 30, 2018 at 11:03:50AM +0000, David Woodhouse wrote: > I pondered that, but I didn't like it. I didn't want to always *force* > those features on, for all CPUs, just because they happened to be > discovered at boot time on the first CPU (which *did* have its > microcode updated by the crappy BIOS, while the others didn't). > > I strongly suspect that's purely an academic concern, and we mostly > check boot_cpu_has() and never even *notice* if secondary CPUs don't > match. I just didn't want to make that *worse*. It tickled my OCD. Well, you need to do it because those bits are AMD-specific and they are not set in the Intel CPUID leaf and identify_cpu() towards the end takes care of "ironing" all those bits out which are not part of the common feature set and which get_cpu_cap() has *not* read out from CPUID. It is one of those I-told-you-so moments when I suggested to make the visible feature bits the artificial ones and have the *actual* hardware ones set those. :-) -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.