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Message-ID: <1517324247.18619.126.camel@infradead.org>
Subject: Re: [PATCH] x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature
 bits on Intel
From:   David Woodhouse <dwmw2@infradead.org>
To:     Alan Cox <gnomes@lxorguk.ukuu.org.uk>,
        Arjan van de Ven <arjan@linux.intel.com>
Cc:     Borislav Petkov <bp@alien8.de>,
        Thomas Gleixner <tglx@linutronix.de>, karahmed@amazon.de,
        x86@kernel.org, linux-kernel@vger.kernel.org,
        tim.c.chen@linux.intel.com, peterz@infradead.org,
        pbonzini@redhat.com, ak@linux.intel.com,
        torvalds@linux-foundation.org, gregkh@linux-foundation.org
In-Reply-To: <20180130145417.71b0c859@alans-desktop>
References: <1517269773-16750-1-git-send-email-dwmw@amazon.co.uk>
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         <20180130131122.s3bs6lbs43go73gj@pd.tnic>
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Date:   Tue, 30 Jan 2018 14:57:27 +0000
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On Tue, 2018-01-30 at 14:54 +0000, Alan Cox wrote:
> The only case I can think of where you'd get a non boot processor that
> didn't have the same microcode loaded as the rest on entry to the OS woul=
d
> be in a system where it was possibly to phyically hot plug processors
> post boot.
>=20
> There are not many such systems and it may be that all of them do
> sufficient deeply unmentionable things in their firmware to cover this.

We've got a patch lurking somewhere to properly collect the return code
from microcode loading on all CPUs, because we've seen it *fail* on one
CPU. Leaving them inconsistent, and on a kexec after that we really
*did* see the boot CPU with IBRS support and a secondary without it.

But really, my point in this patch was not that I expect all this to
work nicely, but that I don't want to make things *worse* by using
setup_force_cpu_cap() when really I only want to set the bit for *this*
CPU.

I'm *all* for ditching the per-CPU bitmasks since they're largely
pointless and we've applied alternatives before the secondaries are
brought up anyway. It's just a rabbithole I didn't need to go down
today.
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