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[209.132.180.67]) by mx.google.com with ESMTP id 33-v6si11989725plg.793.2018.01.30.08.57.28; Tue, 30 Jan 2018 08:57:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=KRLrsZxS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753112AbeA3P1R (ORCPT + 99 others); Tue, 30 Jan 2018 10:27:17 -0500 Received: from mail-oi0-f65.google.com ([209.85.218.65]:45869 "EHLO mail-oi0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751377AbeA3P1O (ORCPT ); Tue, 30 Jan 2018 10:27:14 -0500 Received: by mail-oi0-f65.google.com with SMTP id c189so7364455oib.12; Tue, 30 Jan 2018 07:27:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=1ia0v+Z1oardWgqfwGzDRh6qRZH3tLa2oxtxCo/20nc=; b=KRLrsZxS0vGZwz7hJOu3myyuXLRcdp5Z6WP30R0XpzphrZSAa84uioH2sZQ7xreSeZ tLuXg8QQPloiQtTOsA2s8Xjc83PuYSX0a/ZyF3YzCUkMUJcz+cWN40iAWMuXYx+MUOfp eM6fu4WWaC2QOfbQkmhLiv95CsJDct/TQ0rhEcvCG6dRCBGZzIpfW60rxeEqorXy/k4c w3uGQbQRlmR8dhNdwTvMgpH/E9XPv4/C/fhsZv476QRNie8WkCTjG2cVptPtA0IbjuWl orMDsXAvgBUYvNKvoRo7qqVhFb8Rr3rEQtDdlTpfIfOujykrr4Bamr8quBVZZ+7uuvf7 MMyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=1ia0v+Z1oardWgqfwGzDRh6qRZH3tLa2oxtxCo/20nc=; b=ZD6dJMP50U4yT/QBIfgfZbYlYI65jF/Gu1mqhD3FtZbn0/TqPio6J2OgI/jTkct60e vtJMPTtsezQS35tbViW/qHk4h61h3cO/YteWhez0lyXxfMQsWHPTxuIJ9xi1ciLdc12W kd3TqH3hHxVDP2NevvxhrEPyz6O8eQZW2FUbaV1JHyUw/i0DaDapecQ6nd/hQWhfGaL6 rteq+iW028R05BGjDN73CEFFn6A+b+rGF/Aq9wFO2RbyEr60QK/THcxqfz9pXavs8TrO bQYwo6WhVPmgVqQHZkOCfNgdk5nYjjJdllnJe4X1iNwOO1h4EmBSnXFPGa2y32IoAU+0 shkg== X-Gm-Message-State: AKwxytfQW7zZnel8hsaPeRtZpi5YPP5+QaZAXmrNwm4+oajH6sLwyhrH PnGK0wPI9Zq4H1uzH7oC2SAtHk4K71QwR1vgEMQ= X-Received: by 10.202.8.75 with SMTP id 72mr20159483oii.281.1517326033855; Tue, 30 Jan 2018 07:27:13 -0800 (PST) MIME-Version: 1.0 Received: by 10.157.68.33 with HTTP; Tue, 30 Jan 2018 07:27:13 -0800 (PST) In-Reply-To: References: <28c2c9da4da4c8b07473e97cd4a6cb953f4b507c.1515766253.git.green.hu@gmail.com> From: Arnd Bergmann Date: Tue, 30 Jan 2018 16:27:13 +0100 X-Google-Sender-Auth: hDJslGHsIuAxqf0C1qX_KCoXdss Message-ID: Subject: Re: [PATCH v6 07/36] nds32: Exception handling To: Greentime Hu Cc: Vincent Chen , Greentime , Linux Kernel Mailing List , linux-arch , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Networking , DTML , Al Viro , David Howells , Will Deacon , Daniel Lezcano , linux-serial@vger.kernel.org, Geert Uytterhoeven , Linus Walleij , Mark Rutland , Greg KH , Guo Ren , Randy Dunlap , David Miller , Jonas Bonn , Stefan Kristiansson , Stafford Horne , Vincent Chen Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 30, 2018 at 3:49 PM, Greentime Hu wrote: > Hi, Arnd: > > 2018-01-30 21:33 GMT+08:00 Arnd Bergmann : >> On Tue, Jan 30, 2018 at 11:01 AM, Vincent Chen wrote: >>> 2018-01-24 19:10 GMT+08:00 Arnd Bergmann : >>>> On Wed, Jan 24, 2018 at 12:09 PM, Arnd Bergmann wrote: >>>>> On Wed, Jan 24, 2018 at 11:53 AM, Vincent Chen wrote: >>>>>> 2018-01-18 18:14 GMT+08:00 Arnd Bergmann : >>>> >>>>> Ok. I still wonder about the kernel part of this though: is it a good idea >>>>> for user space to configure whether the kernel does unaligned >>>>> accesses? I would think that the kernel should just be fixed in such >>>>> a case. >>>> >>>> To clarify: I'm asking only about unaligned accesses from kernel code itself, >>>> which is generally considered a bug when >>>> CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is disabled. >>>> >>>> Arnd >>> >>> Thanks for your comments. >>> >>> For performance, we decide always disable >>> CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS even if hardware supports >>> unaligned accessing. Therefore, I will remove kernel unaligned accessing from >>> nds32/mm/alignment.c. In other words, alignment.c only addresses unaligned >>> accessing for user space. >> >> I'm not really following that logic, let's go through that again so I understand >> the situation better. >> >> CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS should be set if and >> only if you have a CPU that does not need to trap on unaligned accesses. >> >> What are the hardware capabilities on nds32? Do you have all three >> categories: >> >> a) some CPUs that always trap on unaligned access >> b) some CPUs that never trap on unaligned access >> c) some CPUs that can be configured to either trap or not trap by >> the kernel? >> > We have type a and c. > We use CONFIG_ALIGNMENT_TRAP for a and > CONFIG_HW_SUPPORT_UNALIGNMENT_ACCESS for c. Ok, got it. > Since unaligned access in kernel code itself should be considered as a > bug, we will remove the emulation code to handle the kernel code > unaligned accessed case. > We think CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS and > CONFIG_HW_SUPPORT_UNALIGNMENT_ACCESS have different purposes because > it will still be more efficient to access by byte even if hardware > support unaligned access. > CONFIG_HW_SUPPORT_UNALIGNMENT_ACCESS is used to prevent generating > unaligned access exception. Hmm, this is a bit tricky. Most architectures actually assume that those two are the same, and nothing else has a HW_SUPPORT_UNALIGNMENT_ACCESS option. We do actually have a related problem on 32-bit ARM, where the current generation of processors (ARMv6 and higher) support unaligned accesses for almost all instructions with the exception of those instructions that operate on multiple memory locations (ldm/stm and ldrd/strd). We can control the use of those instructions in inline assembler, and gcc never uses them when it knows that a pointer is unaligned, but when CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is set, the kernel sometimes intentionally contains code sequences that lead the compiler to believe that a variable is aligned when it is not, so we end up needing a trap handler here. We might at some point want to clean this up by going through all uses of CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS and changing them in a way that leads to better results on both arm32 and nds32. Arnd