Received: by 10.223.176.5 with SMTP id f5csp349540wra; Tue, 30 Jan 2018 12:32:09 -0800 (PST) X-Google-Smtp-Source: AH8x226w7dTqf8kjn3259cEWWuv0sdXNCJEpTOsexFIkGmWzBScWvtt9QxUU3dIAC7TxN0hdyXUN X-Received: by 2002:a17:902:be0f:: with SMTP id r15-v6mr6028487pls.1.1517344329748; Tue, 30 Jan 2018 12:32:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517344329; cv=none; d=google.com; s=arc-20160816; b=ZEKCl7/8ufZYvhezEBAhMDwRJaaLfrWUl7nzrT8ZzXoTT/Qkr6KSv2aaWSVl2OfKiy bCuGiQv6lY9j2E8B9FTfcArCNR4c+RPC69Y5d//xoZ8hD1OtIj2rqAVajXSPWzSoZVPw b+xtlJWKE+5jYTcJzFSXsv0jywfP0n5Li248FcYhf9yC/N4paclcnZ9GMfv6l5TjgHnU 2qD0B2IQ0JckYzEQbRy7zwTSFp70jQi3jYGI5MY8mX+mNKLUyjSdTzzfBlrjBacHIFgC /KRfmndutGv6wZrjlTKY6gUObfRt5qm570FuqvYOwVLcajGZC+pUK1tv0xMZyNVAMtgG Shcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfert-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=LvvjJDQO/444cPhlQllRGRAIs3GzlhMkRIDkBTFW/vw=; b=0di7bENnNi0oNC4ManoDOPCUMuFAGFZ1sofCHZe1aAL1R4vew5c+tOqkfJdwa1qOXM lCqox4AQTz50XyCC2HxDCxXtiO00g/jNEvlYryqnCaiBuJWVWeiUHeUrAoJrexvPIGyh vfNtOYv6wepGnukXxg1GzpwZrFPQOIN7P6SeojTXd27Isqf5le+sfeNbHnGbxrZHojSZ ooNhIPwWol8UB0wjUdg09AJEgE6mLHgJlUKfJ9FrNCgPmjEMrpjyfIvwuJPOiJkwlYFZ v/fd98BLnTOZwJ53hp0YdV5qj+Ki3dn0NHKiRvXNlZooYwHLZO1AMAND4ogZdIlexbOj XRSw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a5-v6si2953231plt.652.2018.01.30.12.31.54; Tue, 30 Jan 2018 12:32:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753026AbeA3UbC (ORCPT + 99 others); Tue, 30 Jan 2018 15:31:02 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:56632 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753029AbeA3UaE (ORCPT ); Tue, 30 Jan 2018 15:30:04 -0500 Received: from localhost.localdomain (unknown [IPv6:2a01:e35:8a7e:4790:1865:5d14:35de:d167]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tescande) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 42DAB27425E; Tue, 30 Jan 2018 20:30:02 +0000 (GMT) From: Thierry Escande To: Archit Taneja , Inki Dae , Thierry Reding , Sandy Huang , Sean Paul , David Airlie , Tomasz Figa , Enric Balletbo i Serra Cc: Haixia Shi , =?UTF-8?q?=C3=98rjan=20Eide?= , Zain Wang , Yakir Yang , Lin Huang , Douglas Anderson , Mark Yao , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org Subject: [PATCH v3 39/43] drm/rockchip: psr: Avoid redundant calls to .set() callback Date: Tue, 30 Jan 2018 21:29:09 +0100 Message-Id: <20180130202913.28724-40-thierry.escande@collabora.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180130202913.28724-1-thierry.escande@collabora.com> References: <20180130202913.28724-1-thierry.escande@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset = "utf-8" Content-Transfert-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tomasz Figa The first time after we call rockchip_drm_do_flush() after rockchip_drm_psr_register(), we go from PSR_DISABLE to PSR_FLUSH. The difference between PSR_DISABLE and PSR_FLUSH is whether or not we have a delayed work pending - PSR is off in either state. However psr_set_state() only catches the transition from PSR_FLUSH to PSR_DISABLE (which never happens), while going from PSR_DISABLE to PSR_FLUSH triggers a call to psr->set() to disable PSR while it's already disabled. This triggers the eDP PHY power-on sequence without being shut down first and this seems to occasionally leave the encoder unable to later enable PSR. Let's just simplify the state machine and simply consider PSR_DISABLE and PSR_FLUSH the same state. This lets us represent the hardware state by a simple boolean called "enabled" and, while at it, rename the misleading "active" boolean to "inhibit", which represents the purpose much better. Also, userspace can (and does) trigger the rockchip_drm_do_flush() path from drmModeDirtyFB() at any time, whether or the encoder is active. If no mode is set, we call into analogix_dp_psr_set() which returns -EINVAL because encoder->crtc is NULL. Avoid this by starting out with psr->allowed set to false. Signed-off-by: Kristian H. Kristensen Signed-off-by: Tomasz Figa Signed-off-by: Thierry Escande --- drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 79 +++++++++-------------------- 1 file changed, 23 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c index c8655e625ba2..448c5fde241c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c @@ -22,19 +22,13 @@ #define PSR_FLUSH_TIMEOUT_MS 100 -enum psr_state { - PSR_FLUSH, - PSR_ENABLE, - PSR_DISABLE, -}; - struct psr_drv { struct list_head list; struct drm_encoder *encoder; struct mutex lock; bool active; - enum psr_state state; + bool enabled; struct delayed_work flush_work; struct work_struct disable_work; @@ -78,52 +72,22 @@ static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder) return psr; } -static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state) +static int psr_set_state_locked(struct psr_drv *psr, bool enable) { - /* - * Allowed finite state machine: - * - * PSR_ENABLE < = = = = = > PSR_FLUSH - * | ^ | - * | | | - * v | | - * PSR_DISABLE < - - - - - - - - - - */ - if (state == psr->state || !psr->active) - return; - - /* Already disabled in flush, change the state, but not the hardware */ - if (state == PSR_DISABLE && psr->state == PSR_FLUSH) { - psr->state = state; - return; - } + int ret; - /* Actually commit the state change to hardware */ - switch (state) { - case PSR_ENABLE: - if (psr->set(psr->encoder, true)) - return; - break; - - case PSR_DISABLE: - case PSR_FLUSH: - if (psr->set(psr->encoder, false)) - return; - break; - - default: - pr_err("%s: Unknown state %d\n", __func__, state); - return; - } + if (!psr->active) + return -EINVAL; - psr->state = state; -} + if (enable == psr->enabled) + return 0; -static void psr_set_state(struct psr_drv *psr, enum psr_state state) -{ - mutex_lock(&psr->lock); - psr_set_state_locked(psr, state); - mutex_unlock(&psr->lock); + ret = psr->set(psr->encoder, enable); + if (ret) + return ret; + + psr->enabled = enable; + return 0; } static void psr_flush_handler(struct work_struct *work) @@ -131,10 +95,8 @@ static void psr_flush_handler(struct work_struct *work) struct psr_drv *psr = container_of(to_delayed_work(work), struct psr_drv, flush_work); - /* If the state has changed since we initiated the flush, do nothing */ mutex_lock(&psr->lock); - if (psr->state == PSR_FLUSH) - psr_set_state_locked(psr, PSR_ENABLE); + psr_set_state_locked(psr, true); mutex_unlock(&psr->lock); } @@ -176,6 +138,7 @@ int rockchip_drm_psr_deactivate(struct drm_encoder *encoder) mutex_lock(&psr->lock); psr->active = false; + psr->enabled = false; mutex_unlock(&psr->lock); cancel_delayed_work_sync(&psr->flush_work); cancel_work_sync(&psr->disable_work); @@ -187,8 +150,12 @@ EXPORT_SYMBOL(rockchip_drm_psr_deactivate); static void rockchip_drm_do_flush(struct psr_drv *psr) { cancel_delayed_work_sync(&psr->flush_work); - psr_set_state(psr, PSR_FLUSH); - mod_delayed_work(system_wq, &psr->flush_work, PSR_FLUSH_TIMEOUT_MS); + + mutex_lock(&psr->lock); + if (!psr_set_state_locked(psr, false)) + mod_delayed_work(system_wq, &psr->flush_work, + PSR_FLUSH_TIMEOUT_MS); + mutex_unlock(&psr->lock); } /** @@ -355,8 +322,8 @@ int rockchip_drm_psr_register(struct drm_encoder *encoder, INIT_WORK(&psr->disable_work, psr_disable_handler); mutex_init(&psr->lock); - psr->active = true; - psr->state = PSR_DISABLE; + psr->active = false; + psr->enabled = false; psr->encoder = encoder; psr->set = psr_set; -- 2.14.1