Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Subject: Re: [PATCH] x86/speculation: Use Indirect Branch Prediction Barrier
 in context switch
To:     Borislav Petkov <bp@alien8.de>
Cc:     David Woodhouse <dwmw@amazon.co.uk>, arjan@linux.intel.com,
        tglx@linutronix.de, karahmed@amazon.de, x86@kernel.org,
        linux-kernel@vger.kernel.org, peterz@infradead.org,
        pbonzini@redhat.com, ak@linux.intel.com,
        torvalds@linux-foundation.org, gregkh@linux-foundation.org,
        mingo@kernel.org, luto@kernel.org, linux@dominikbrodowski.net
References: <1517263487-3708-1-git-send-email-dwmw@amazon.co.uk>
 <20180130203836.bsgme6kf6hstgbrx@pd.tnic>
 <024dd53b-1912-34fa-deb8-550c111df521@linux.intel.com>
 <20180130215731.pszc5u4gcc32ds4v@pd.tnic>
 <296de30b-515b-6eab-1b13-bb2f71451004@linux.intel.com>
 <20180130224340.2zdfqttupugtqww5@pd.tnic>
From:   Tim Chen <tim.c.chen@linux.intel.com>
Message-ID: <74fd9c82-cd18-562b-8df6-69f629da460b@linux.intel.com>
Date:   Tue, 30 Jan 2018 16:25:26 -0800
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101
 Thunderbird/52.1.0
MIME-Version: 1.0
In-Reply-To: <20180130224340.2zdfqttupugtqww5@pd.tnic>
Content-Type: text/plain; charset=utf-8
Content-Language: en-US
Content-Transfer-Encoding: 7bit
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

On 01/30/2018 02:43 PM, Borislav Petkov wrote:
> On Tue, Jan 30, 2018 at 02:26:53PM -0800, Tim Chen wrote:
>> If the process has multiple threads running on different cpus,
> 
> I'm talking about issuing the barrier in set_dumpable(). What threads on
> multiple CPUs?
> 

As dumpable is a property in mm->flags, it affects all threads running on other cpus sharing
the same mm.  If you issue IBPB only on the cpu that perform the set_dumpable(),
the theoretical hole you are trying to close still exist on threads running on
other cpu.

        time ----->
(cpu A)                set_dumpable victim (thread1), issue IBPB 
(cpu B) attacker -> victim (thread2), missed IBPB                 -> attacker -> victim (IBPB issued)                      


That said, I think the risk is minuscule and is not worth the cost to set IBPB on the other cpus.

Tim