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s=selector1-wdc-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=QpEhfbAta5FueUMFhZubvwqXtN4Pez8EZb7M+xFNGAI=; b=DBDLthhlQJ4neG2pbZyBVG46LAQwvwflsBKsHyzen0TzflTRoMMjfzfeSHWbgWxBfaWmmWgUvNyN82G5KKK5SPhNjs3cRfeztL7Au99DEvFjKE7DQOdLjYFsi0chPI+z0QrkHgWDsdHuThLLWbgVv884NbP9K3FW05WsmKA1c6E= Received: from DM5PR04MB1085.namprd04.prod.outlook.com (10.174.242.35) by DM5PR04MB1002.namprd04.prod.outlook.com (10.174.242.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.444.14; Wed, 31 Jan 2018 07:39:06 +0000 Received: from DM5PR04MB1085.namprd04.prod.outlook.com ([10.174.242.35]) by DM5PR04MB1085.namprd04.prod.outlook.com ([10.174.242.35]) with mapi id 15.20.0464.012; Wed, 31 Jan 2018 07:39:06 +0000 From: Avri Altman To: Asutosh Das , "subhashj@codeaurora.org" , "cang@codeaurora.org" , "vivek.gautam@codeaurora.org" , "rnayak@codeaurora.org" , "vinholikatti@gmail.com" , "jejb@linux.vnet.ibm.com" , "martin.petersen@oracle.com" CC: "linux-scsi@vger.kernel.org" , Venkat Gopalakrishnan , open list Subject: RE: [PATCH 1/1] scsi: ufs: make sure all interrupts are processed Thread-Topic: [PATCH 1/1] scsi: ufs: make sure all interrupts are processed Thread-Index: AQHTmYaHcSUT5SYu3EOc2oEnVQ6gu6ONmZLw Date: Wed, 31 Jan 2018 07:39:06 +0000 Message-ID: References: <1517288066-13171-1-git-send-email-asutoshd@codeaurora.org> In-Reply-To: <1517288066-13171-1-git-send-email-asutoshd@codeaurora.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Avri.Altman@wdc.com; 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x-microsoft-antispam-message-info: Eh9G8Otg6daIpPXu4PN7NkIuI/ghFHTd7SkEfjj8twyqFiMZuWNKHQgQ68zsTX5soDdKONkgkWcv1tKTir/RSQ== spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 07a0d53b-9a6b-44c3-5d50-08d5687db53f X-MS-Exchange-CrossTenant-originalarrivaltime: 31 Jan 2018 07:39:06.1478 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR04MB1002 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Can you elaborate how this can even happen? Isn't the interrupt aggregation capability should attend for those cases? Thanks, Avri > -----Original Message----- > From: linux-scsi-owner@vger.kernel.org [mailto:linux-scsi- > owner@vger.kernel.org] On Behalf Of Asutosh Das > Sent: Tuesday, January 30, 2018 6:54 AM > To: subhashj@codeaurora.org; cang@codeaurora.org; > vivek.gautam@codeaurora.org; rnayak@codeaurora.org; > vinholikatti@gmail.com; jejb@linux.vnet.ibm.com; > martin.petersen@oracle.com > Cc: linux-scsi@vger.kernel.org; Venkat Gopalakrishnan > ; Asutosh Das ; open > list > Subject: [PATCH 1/1] scsi: ufs: make sure all interrupts are processed >=20 > From: Venkat Gopalakrishnan >=20 > As multiple requests are submitted to the ufs host controller in parallel= there > could be instances where the command completion interrupt arrives later f= or a > request that is already processed earlier as the corresponding doorbell w= as > cleared when handling the previous interrupt. Read the interrupt status i= n a > loop after processing the received interrupt to catch such interrupts and= handle > it. >=20 > Signed-off-by: Venkat Gopalakrishnan > Signed-off-by: Asutosh Das > --- > drivers/scsi/ufs/ufshcd.c | 27 +++++++++++++++++++-------- > 1 file changed, 19 insertions(+), 8 deletions(-) >=20 > diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index > 8af2af3..58d81de 100644 > --- a/drivers/scsi/ufs/ufshcd.c > +++ b/drivers/scsi/ufs/ufshcd.c > @@ -5357,19 +5357,30 @@ static irqreturn_t ufshcd_intr(int irq, void *__h= ba) > u32 intr_status, enabled_intr_status; > irqreturn_t retval =3D IRQ_NONE; > struct ufs_hba *hba =3D __hba; > + int retries =3D hba->nutrs; >=20 > spin_lock(hba->host->host_lock); > intr_status =3D ufshcd_readl(hba, REG_INTERRUPT_STATUS); > - enabled_intr_status =3D > - intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE); >=20 > - if (intr_status) > - ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS); > + /* > + * There could be max of hba->nutrs reqs in flight and in worst case > + * if the reqs get finished 1 by 1 after the interrupt status is > + * read, make sure we handle them by checking the interrupt status > + * again in a loop until we process all of the reqs before returning. > + */ > + do { > + enabled_intr_status =3D > + intr_status & ufshcd_readl(hba, > REG_INTERRUPT_ENABLE); > + if (intr_status) > + ufshcd_writel(hba, intr_status, > REG_INTERRUPT_STATUS); > + if (enabled_intr_status) { > + ufshcd_sl_intr(hba, enabled_intr_status); > + retval =3D IRQ_HANDLED; > + } > + > + intr_status =3D ufshcd_readl(hba, REG_INTERRUPT_STATUS); > + } while (intr_status && --retries); >=20 > - if (enabled_intr_status) { > - ufshcd_sl_intr(hba, enabled_intr_status); > - retval =3D IRQ_HANDLED; > - } > spin_unlock(hba->host->host_lock); > return retval; > } > -- > Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, > Inc. > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linu= x > Foundation Collaborative Project.