Received: by 10.223.176.5 with SMTP id f5csp1170131wra; Wed, 31 Jan 2018 02:20:09 -0800 (PST) X-Google-Smtp-Source: AH8x226jOJcVKz0PgIOUrPwtSE8z7xuK2/9mTOrDQZRAhWr3MdCjmhgUOna4B2yKkUPuJknzZw7i X-Received: by 10.101.91.66 with SMTP id y2mr27028186pgr.11.1517394009354; Wed, 31 Jan 2018 02:20:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517394009; cv=none; d=google.com; s=arc-20160816; b=INWpKhpL0G+4akHrSmVS9ciHzXR3XO44hduIDur7lcgjKidGItEWmvfO482Rpu7lQW I1hsgiwxf+ligiaYhI6eEhKJLuqLPGDqC4eIz1yWGC1wKjYHORrDKuvXkruN4lx4LnZF 2RQMCH3rMz+UIGS2GUeg0ut4w8sliQAy1erTUVnhYn13mNwc4t0bOeVbSeevYVbr23bE 4HBzZwuW4ga4+r2GtaaDqo5CoL6rqqDVtGIJFHKKaKgbL6HyUVT/Y42C4Oa8K4nqp4wl Cp0qYPpuxrlPNzic3eLqmiTtyimB4H+jNAnjk+RWlZ8YebIQK8hucKQUVPzk8APh0LqX u3YQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=+3wpWo2XU84MqYZdSR5zVTF1dY9kUCbnPncagBwYJeM=; b=FXkVZQVWm+i6aREUh8YF+xlVMwHHcl/FxE63QBpA4a9p6PG2L8L7VkcVjOmqedC5/y MBTfg4dXfqvMkHZOtIQkgSzOzChrdcr67jVT8ZziyC3SrK/zlGot4zC65QLtc3v2ZNh0 vd1H8NYXBdp1i1b7mwVJpayBgimnX61cRiaR3YrymuWLof+9qFmPWBMxVwLRbPopihxa 3JPT0qrkOxOL+5G+v0dF9CJ3B5b+ykV38mUHP1+Nd+sC0pfITPMFDo7xP4DVOHQ/G9el n/eAmZKRailSAQHbqJ9lrrEk4NT/DGRYFVIbMDLKspGJdQmQM+1eg469aBFrbEgWRHY2 G7Tw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p14-v6si5517550plo.420.2018.01.31.02.19.55; Wed, 31 Jan 2018 02:20:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753338AbeAaJPY (ORCPT + 99 others); Wed, 31 Jan 2018 04:15:24 -0500 Received: from mga14.intel.com ([192.55.52.115]:40813 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751756AbeAaJPW (ORCPT ); Wed, 31 Jan 2018 04:15:22 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Jan 2018 01:15:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,439,1511856000"; d="scan'208";a="14272964" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 31 Jan 2018 01:15:19 -0800 Received: by black.fi.intel.com (Postfix, from userid 1000) id 6C19120B; Wed, 31 Jan 2018 11:15:18 +0200 (EET) From: "Kirill A. Shutemov" To: Ingo Molnar , x86@kernel.org, Thomas Gleixner , "H. Peter Anvin" Cc: Tom Lendacky , Dave Hansen , Kai Huang , linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCH 0/3] Enumerate TME and PCONFIG Date: Wed, 31 Jan 2018 12:15:06 +0300 Message-Id: <20180131091509.26531-1-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.15.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset enumerates two features required for Multi-Key Total Memory Encryption enabling[1]. Apart from trivial cpufeatures bits, the patchset enumerates how many bits from physical address are claimed for encryption key ID. This may be critical as we or guest VM must not use these bits for physical address. Please review and consider applying. [1] https://software.intel.com/sites/default/files/managed/a5/16/Multi-Key-Total-Memory-Encryption-Spec.pdf Kirill A. Shutemov (3): x86/cpufeatures: Add Intel Total Memory Encryption cpufeature x86/tme: Detect if TME and MKTME is activated by BIOS x86/cpufeatures: Add Intel PCONFIG cpufeature arch/x86/include/asm/cpufeatures.h | 2 + arch/x86/kernel/cpu/intel.c | 83 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 85 insertions(+) -- 2.15.1