Received: by 10.223.176.5 with SMTP id f5csp1381525wra; Wed, 31 Jan 2018 05:42:39 -0800 (PST) X-Google-Smtp-Source: AH8x22763nq5XgzNJTagV2Pjz0G6bJqFlYl5u8JVrsryIjZYNtIUzgstiT/5CVgUhhBvMT0WL/0m X-Received: by 10.98.238.2 with SMTP id e2mr33813955pfi.206.1517406159648; Wed, 31 Jan 2018 05:42:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517406159; cv=none; d=google.com; s=arc-20160816; b=HpUSLTY5pb9SGurONB+crKE5xdbXKN/Inuht+2mWzppMk7YiDfcBcuc80ll2inbIyG RDOxlIBbK/jTmI0zf5Pn8qqcp/U7S0LbCyshBXoJWdAJ4HO7cjcFL7hC8eptuGGWDIZs LPZzduXMNM635xfzIvE8dNnSVjWmLqvmwSqxRJu1WL8SQ0fj79iz9USHoBYADRdxBOmk j9jk4pwXb3YICraw7/9vXelZCd+IJoMcUW1Da8PZBtP8DR83uzN14GSLN+VWfHZjkpng OcYW8dlZM1AtXCeRQj6Za1215TN+LTMPXaOZZ8g9fu9bnBQhban5I5jzyIx46C1uhgPh 5z1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:date:cc:to:from:subject:message-id :arc-authentication-results; bh=t4+cJc1CmKqCuEwTO92q8aEzxjgU8CbgqSfRJANtb5c=; b=iETNLzMdX+FAQkaDMhYRzPYBiW17fpgstowR4sBzDp/pea24QQ3a9nBRuaM6ugcm40 z4De8HGFfa+ZgFw/oMCkJWVwNylLvdo1N8R+hC91B545dS8toIN/Kysp70IknC34HH+i U0vFOD5m8t6zh+F1CRlhDnQ/a8SJGzlGA3Kn1RuRKiLI+fyIkVjTSwl185pTdezH0qI6 DSAQpF4APFagr+qmvJ085+/IX1wJHJps6HRTafVm6Dblr0EB6ci0JoZThUJxl1VjmaPe qfXBdD/w44MPhlZStRpvvpRv/xwOXB/NkbPm4NiRFDLJjcZMmsCU5AfRctfDwP1s1zJa qtWQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s12si1535862pgp.693.2018.01.31.05.42.24; Wed, 31 Jan 2018 05:42:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753078AbeAaMyV (ORCPT + 99 others); Wed, 31 Jan 2018 07:54:21 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:60587 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752944AbeAaMyT (ORCPT ); Wed, 31 Jan 2018 07:54:19 -0500 Received: from weser.hi.pengutronix.de ([2001:67c:670:100:fa0f:41ff:fe58:4010]) by metis.ext.pengutronix.de with esmtp (Exim 4.89) (envelope-from ) id 1egrty-0002vC-1y; Wed, 31 Jan 2018 13:54:10 +0100 Message-ID: <1517403243.14302.1.camel@pengutronix.de> Subject: Re: [PATCH v3 33/43] drm/panel: simple: Change mode for Sharp lq123p1jx31 From: Lucas Stach To: Thierry Escande , Archit Taneja , Inki Dae , Thierry Reding , Sandy Huang , Sean Paul , David Airlie , Tomasz Figa , Enric Balletbo i Serra Cc: Zain Wang , Lin Huang , Douglas Anderson , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Yakir Yang , =?ISO-8859-1?Q?=D8rjan?= Eide , Mark Yao , Haixia Shi Date: Wed, 31 Jan 2018 13:54:03 +0100 In-Reply-To: <20180130202913.28724-34-thierry.escande@collabora.com> References: <20180130202913.28724-1-thierry.escande@collabora.com> <20180130202913.28724-34-thierry.escande@collabora.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1+deb9u1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:fa0f:41ff:fe58:4010 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Dienstag, den 30.01.2018, 21:29 +0100 schrieb Thierry Escande: > From: Sean Paul > > Change the mode for Sharp lq123p1jx31 panel to something more > rockchip-friendly such that we can use the fixed PLLs to > generate the pixel clock This should really switch to a display timing instead of exposing a single mode. The display timing has min, typical, max tuples for all the timings values, which would allow the attached driver to vary the timings inside the allowed bounds if it makes sense. Trying to hit a specific pixel clock to free up a PLL is exactly one of the use cases envisioned for the display timings stuff. Regards, Lucas > Cc: Chris Zhong > Cc: Stéphane Marchesin > Signed-off-by: Sean Paul > Signed-off-by: Thierry Escande > --- >  drivers/gpu/drm/panel/panel-simple.c | 7 ++++--- >  1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/panel/panel-simple.c > b/drivers/gpu/drm/panel/panel-simple.c > index 5591984a392b..a4a6ea3ca0e6 100644 > --- a/drivers/gpu/drm/panel/panel-simple.c > +++ b/drivers/gpu/drm/panel/panel-simple.c > @@ -1742,17 +1742,18 @@ static const struct panel_desc > sharp_lq101k1ly04 = { >  }; >   >  static const struct drm_display_mode sharp_lq123p1jx31_mode = { > - .clock = 252750, > + .clock = 266667, >   .hdisplay = 2400, >   .hsync_start = 2400 + 48, >   .hsync_end = 2400 + 48 + 32, > - .htotal = 2400 + 48 + 32 + 80, > + .htotal = 2400 + 48 + 32 + 139, >   .vdisplay = 1600, >   .vsync_start = 1600 + 3, >   .vsync_end = 1600 + 3 + 10, > - .vtotal = 1600 + 3 + 10 + 33, > + .vtotal = 1600 + 3 + 10 + 84, >   .vrefresh = 60, >   .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > + .type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER, >  }; >   >  static const struct panel_desc sharp_lq123p1jx31 = {