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[209.132.180.67]) by mx.google.com with ESMTP id k16-v6si1367530pll.361.2018.01.31.22.57.56; Wed, 31 Jan 2018 22:58:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=ldHeY12j; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751706AbeBAG5b (ORCPT + 99 others); Thu, 1 Feb 2018 01:57:31 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:37278 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751119AbeBAG5Z (ORCPT ); Thu, 1 Feb 2018 01:57:25 -0500 Received: by mail-wm0-f65.google.com with SMTP id v71so3541967wmv.2; Wed, 31 Jan 2018 22:57:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=YvdaOex8O6WUydJDYFmqJyC5TGTtVzqgfoZMxqhZdcw=; b=ldHeY12jmrtwyVA8njfhWYc0/5ecG3ndmuovpa8VtgWs7GzoGB0hnlBjsQRRoIpFWs GlJYxNG4LUSgWxxh5A5hSQlinkDQHNk1lwI0CkR7Idf5VCUA5kDcZoH4kNzI0D6H9hDA SWtCF/Fv2Q1cCy+hpAjEt27lKk5SkHkUdtB3GHZsFj89Ngv/zShhwN3t08wjo4DcwCQh OcQHvF3vIHYB4JD1Sw/GC3b0NZha2SumQAkAlsaVYUudcss5DZALwlaogCYGHWPClpi4 0B6W3QpE1QuvX1ynDEiy021QTv8/kDg6pNevo/xbQ7oJIj9rh4ytiDKk+SITqyQhTUjr Soiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=YvdaOex8O6WUydJDYFmqJyC5TGTtVzqgfoZMxqhZdcw=; b=Wx6Uwh9O+edoW1OqC+XyHIZ9yfNkyXzcKnbpZ766tiZxe4gvhXA1dO6Qhnkblvlowy X/nvzRBEeim20q6AYFNa7URQ5Mxfjx5UXvaWgEVFphq/VeBaKoNRWwNP+Z8reEvvnqaa TzKDFv2mhWwcTiY8zv9st+9FZM1hCi69LefwFt8lUXhdhaDmefkpobYNHAn1ANHd3E11 nRcJfHcBezBorTmVqpqbZInW8Q+6sZYGdMiYerWpA3x3C0PC/T8W5S6UyB6w+VuHfeCS PGeB8qnWHImsS8h9DgLQ1w5zM+B19RXXN9E0WYgHFJdJGynzYDbn/+7qRY8YUszC3VPT GOtQ== X-Gm-Message-State: AKwxytfyyWVYiJOJNjh3AHC6m/jJqhP5i0D9kMygLfUXyWebOn3ThO3O XDMwTYqoffMaoGvKIufLaLIWNAZaBp60fQ2HPCo= X-Received: by 10.80.151.22 with SMTP id c22mr60504904edb.225.1517468243668; Wed, 31 Jan 2018 22:57:23 -0800 (PST) MIME-Version: 1.0 Received: by 10.80.204.5 with HTTP; Wed, 31 Jan 2018 22:57:23 -0800 (PST) In-Reply-To: <549f02e5-19d7-8cec-674f-247dfb2d2467@linaro.org> References: <20171205154701.27730-1-georgi.djakov@linaro.org> <20171205154701.27730-3-georgi.djakov@linaro.org> <20171224050625.GH12655@minitux> <549f02e5-19d7-8cec-674f-247dfb2d2467@linaro.org> From: Jassi Brar Date: Thu, 1 Feb 2018 12:27:23 +0530 Message-ID: Subject: Re: [PATCH v11 2/6] mailbox: qcom: Create APCS child device for clock controller To: Georgi Djakov Cc: Bjorn Andersson , Stephen Boyd , Michael Turquette , Rob Herring , linux-clk@vger.kernel.org, Linux Kernel Mailing List , linux-arm-msm@vger.kernel.org, Devicetree List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 1, 2018 at 12:10 AM, Georgi Djakov wrote: > > Hi Jassi, > > On 01/27/2018 05:44 AM, Jassi Brar wrote: > > On Thu, Jan 4, 2018 at 10:26 PM, Georgi Djakov wrote: > >> Hi Jassi, > >> > >> On 12/29/2017 08:14 AM, Jassi Brar wrote: > >>> Hi Bjorn, > >>> > >>> On Sun, Dec 24, 2017 at 10:36 AM, Bjorn Andersson > >>> wrote: > >>>> On Fri 22 Dec 20:57 PST 2017, Jassi Brar wrote: > >>>> > >>>>> On Tue, Dec 5, 2017 at 9:16 PM, Georgi Djakov wrote: > >>>>>> There is a clock controller functionality provided by the APCS hardware > >>>>>> block of msm8916 devices. The device-tree would represent an APCS node > >>>>>> with both mailbox and clock provider properties. > >>>>>> > >>>>> The spec might depict a 'clock' box and 'mailbox' box inside the > >>>>> bigger APCS box. However, from the code I see in this patchset, they > >>>>> are orthogonal and can & should be represented as independent DT > >>>>> nodes. > >>>> > >>>> The APCS consists of a number of different hardware blocks, one of them > >>>> being the "APCS global" block, which is what this node and drivers > >>>> relate to. On 8916 this contains both the IPC register and clock > >>>> control. But it's still just one block according to the hardware > >>>> specification. > >>>> > >>>> As such DT should describe the one hardware block by one node IMHO. > >>>> > >>> In my even humbler opinion, DT should describe a h/w functional unit > >>> which _could_ be seen as a standalone component. > >> > >> The APCS is one separate register block related to the CPU cluster. I > >> haven't seen any strict guidelines for such cases in the DT docs, and > >> during the discussion got the impression that this is the preferred > >> binding. Rob has also reviewed the binding, so we should be fine to move > >> forward with this one. > >> > > Well, I can't overrule Rob. But I am really not happy with random > > device spawning from mailbox drivers. I know there are such instances > > already in the kernel but that doesn't make it legit... unless there > > is some hard dependency. Is there? > > The dependency is that on this SoC, these functionalities are combined > into this "CPU subsystem" block. > I see the register space is shared between mailbox and the clock. So I guess, yes, simply creating a device here and passing the common regmap is tidier. Which patches are already picked up? Cheers!