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[209.132.180.67]) by mx.google.com with ESMTP id 12si806411pfh.0.2018.02.01.04.25.42; Thu, 01 Feb 2018 04:25:57 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752528AbeBAMYn (ORCPT + 99 others); Thu, 1 Feb 2018 07:24:43 -0500 Received: from mx2.suse.de ([195.135.220.15]:33909 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752244AbeBAMYm (ORCPT ); Thu, 1 Feb 2018 07:24:42 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 43DC6AB02; Thu, 1 Feb 2018 12:24:41 +0000 (UTC) Subject: Re: [PATCH] x86/xen: init %gs very early to avoid page faults with stack protector To: Andrew Cooper , linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org Cc: boris.ostrovsky@oracle.com, stable@vger.kernel.org References: <20180201121601.1268-1-jgross@suse.com> <66ad81d7-0230-d0a5-f4fb-9dbbd8162884@citrix.com> From: Juergen Gross Message-ID: <24614db8-7369-8178-f690-7c1614e2c0c9@suse.com> Date: Thu, 1 Feb 2018 13:24:39 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: <66ad81d7-0230-d0a5-f4fb-9dbbd8162884@citrix.com> Content-Type: text/plain; charset=utf-8 Content-Language: de-DE Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/02/18 13:22, Andrew Cooper wrote: > On 01/02/18 12:16, Juergen Gross wrote: >> When running as Xen pv guest %gs is initialized some time after >> C code is started. Depending on stack protector usage this might be >> too late, resulting in page faults. >> >> So setup %gs and MSR_GS_BASE in assembly code already. >> >> Cc: stable@vger.kernel.org >> Signed-off-by: Juergen Gross >> --- >> arch/x86/xen/xen-head.S | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S >> index 497cc55a0c16..b47d87076efb 100644 >> --- a/arch/x86/xen/xen-head.S >> +++ b/arch/x86/xen/xen-head.S >> @@ -9,7 +9,9 @@ >> >> #include >> #include >> +#include >> #include >> +#include >> #include >> >> #include >> @@ -35,6 +37,18 @@ ENTRY(startup_xen) >> mov %_ASM_SI, xen_start_info >> mov $init_thread_union+THREAD_SIZE, %_ASM_SP >> >> + /* Set up %gs. >> + * >> + * The base of %gs always points to the bottom of the irqstack >> + * union. If the stack protector canary is enabled, it is >> + * located at %gs:40. Note that, on SMP, the boot cpu uses >> + * init data section till per cpu areas are set up. >> + */ >> + movl $MSR_GS_BASE,%ecx >> + movq $INIT_PER_CPU_VAR(irq_stack_union),%rax >> + cdq >> + wrmsr > > You surely want a #ifdef __x86_64__ ?  This path is common to the 32bit > entry as well? Oh, indeed! Thanks for noticing. V2 coming soon... Juergen