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[209.132.180.67]) by mx.google.com with ESMTP id n80si4062699pfi.380.2018.02.01.06.27.50; Thu, 01 Feb 2018 06:28:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751665AbeBAO1V (ORCPT + 99 others); Thu, 1 Feb 2018 09:27:21 -0500 Received: from mail.kernel.org ([198.145.29.99]:57030 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751450AbeBAO1T (ORCPT ); Thu, 1 Feb 2018 09:27:19 -0500 Received: from mail-qk0-f171.google.com (mail-qk0-f171.google.com [209.85.220.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id F173D21798; Thu, 1 Feb 2018 14:27:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F173D21798 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=robh+dt@kernel.org Received: by mail-qk0-f171.google.com with SMTP id n188so8194499qkn.11; Thu, 01 Feb 2018 06:27:18 -0800 (PST) X-Gm-Message-State: AKwxytes5QlRWTRlMzgNO91ZCM6WLh7y4TcqcukB0zpJ6DdirJSAgR1U kJtmaonrfFD36ays1i6a13fx7VLa8GesJn/qqw== X-Received: by 10.55.135.70 with SMTP id j67mr55664682qkd.34.1517495238147; Thu, 01 Feb 2018 06:27:18 -0800 (PST) MIME-Version: 1.0 Received: by 10.12.147.20 with HTTP; Thu, 1 Feb 2018 06:26:57 -0800 (PST) In-Reply-To: References: <1517429142-25727-1-git-send-email-frowand.list@gmail.com> <5dd35d8f-c430-237e-9863-2e73556f92ec@gmail.com> From: Rob Herring Date: Thu, 1 Feb 2018 08:26:57 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] of: cache phandle nodes to decrease cost of of_find_node_by_phandle() To: Frank Rowand Cc: Chintan Pandya , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 1, 2018 at 8:24 AM, Rob Herring wrote: > On Wed, Jan 31, 2018 at 3:43 PM, Frank Rowand wrote: >> On 01/31/18 12:05, frowand.list@gmail.com wrote: >>> From: Frank Rowand >>> >>> Create a cache of the nodes that contain a phandle property. Use this >>> cache to find the node for a given phandle value instead of scanning >>> the devicetree to find the node. If the phandle value is not found >>> in the cache, of_find_node_by_phandle() will fall back to the tree >>> scan algorithm. >>> >>> The cache is initialized in of_core_init(). >>> >>> The cache is freed via a late_initcall_sync(). >>> >>> Signed-off-by: Frank Rowand >>> --- >>> >>> Some of_find_by_phandle() calls may occur before the cache is >>> initialized or after it is freed. For example, for the qualcomm >>> qcom-apq8074-dragonboard, 11 calls occur before the initialization >>> and 80 occur after the cache is freed (out of 516 total calls.) >>> >>> >>> drivers/of/base.c | 85 ++++++++++++++++++++++++++++++++++++++++++++++--- >>> drivers/of/of_private.h | 5 +++ >>> drivers/of/resolver.c | 21 ------------ >>> 3 files changed, 86 insertions(+), 25 deletions(-) >> >> Some observations.... >> >> The size of the cache for a normal device tree would be a couple of >> words of overhead for the cache, plus one pointer per devicetree node >> that contains a phandle property. This will be less space than >> would be used by adding a hash field to each device node. It is >> also less space than was used by the older algorithm (long gone) >> that added a linked list through the nodes that contained a >> phandle property. >> >> This is assuming that the values of the phandle properties are >> the default ones created by the dtc compiler. In the case >> where a very large phandle property value is hand-coded in >> a devicetree source, the size of the cache is capped at one >> entry per node. In this case, a little bit of space will be >> wasted -- but this is just a sanity fallback, it should not >> be encountered, and can be fixed by fixing the devicetree >> source. > > I don't think we should rely on how dtc allocates phandles. dtc is not > the only source of DeviceTrees. If we could do that, then lets make > them have some known flag in the upper byte so we have some hint for > phandle values. 2^24 phandles should be enough for anyone.TM > > Your cache size is also going to balloon if the dtb was built with > '-@'. Since you walk the tree for every phandle, it is conceivable > that you could make things slower. Disregard the 2nd statement. Only 1 walk is not going to register.