Received: by 10.223.176.5 with SMTP id f5csp211468wra; Thu, 1 Feb 2018 18:45:09 -0800 (PST) X-Google-Smtp-Source: AH8x225GwcKwGMKPZ+qTdYxJ4MQWBni4sl9XSH6UNJOciWLYDczaZFhs1ZZOMKBJRBiwRvPwpNpI X-Received: by 2002:a17:902:5a8c:: with SMTP id r12-v6mr17248721pli.87.1517539509485; Thu, 01 Feb 2018 18:45:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517539509; cv=none; d=google.com; s=arc-20160816; b=ZxtJ20KPWAFNHeWCPx0aU8EhTWAO6WXobSM9dAhLCeglGeIOdyDoO1EaRnpKtzVAhG RBRLj+6wZnAjxT+Xyyj3GzxHkzvKGkFw4yrSYiegWaeLbm4io8FdHK672UownrjCD075 tB3Ji6MVaYz7t1ptqMhzg6S5Vo74KcBQY7YyuCjtmI+rpGze8fVM3qeSn3/jieYSNa/W N8dQYgZWqnl8DOqhl2g4wn+NDNt422b0222IQrWZSdauTOPczzs71Mb7ix9JKaAkXbpU kBikCSeigNIv8Xtpz/9RCojNdsSfD4MMpIeY/IxbIF1NS9LyTB73Rel+ljPLyKS0dowF ZOIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature :arc-authentication-results; bh=UxqwTtGPBngS9nDKkm/yP25EjkkCFqN0N3cwRZSkypY=; b=BaQnO4EK3fS8EJZxsDhwWAI9ij/sJ98IAR2lk7McP6gPr7GRBa0av2NeE9By6mdCm4 x680KThfonbn4VX2NDwJaBgOw7aCnyIb98kZ/ud7bd3SX5p5TT5OFxOykTy3ogyKT5Jt bRDY6aMTem10dm6hCWW/duqdX1KV1qQ+vPqRoCi8Q0gWK4ue3dPtVs/T/dcHFguvMaUC vyGBzUF/+aMiptRBsYeux0HRJ0gsMFBOKUZLCuNF0dqJ428Nqm3QKjbx0uu4m4jXqJIE A+KYxi4RNzsuC3xVUlrBzUTKc18zWWALoAO3h+vUZEA1U392RQTnDpJGwrwRICGuCH62 2OTQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AlwW5xPu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e192si677325pgc.547.2018.02.01.18.44.54; Thu, 01 Feb 2018 18:45:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AlwW5xPu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755222AbeBBCdA (ORCPT + 99 others); Thu, 1 Feb 2018 21:33:00 -0500 Received: from mail-oi0-f41.google.com ([209.85.218.41]:42721 "EHLO mail-oi0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754558AbeBBCc4 (ORCPT ); Thu, 1 Feb 2018 21:32:56 -0500 Received: by mail-oi0-f41.google.com with SMTP id c8so14973374oiy.9 for ; Thu, 01 Feb 2018 18:32:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=UxqwTtGPBngS9nDKkm/yP25EjkkCFqN0N3cwRZSkypY=; b=AlwW5xPuo7YA9Q7krUEfYeOK94FUuEPqyw9cLJIrxAe6ZEcfuKxuGYDb7kR8LrNYqW EzOTLRzKFDQSiCcibJlt9saaEldapZsK9eaevBRp0+An0NBSeRIUkDxgpqeqAhbjn3KC FVhGDSoj8AWyYL5eVCKIxxlUkQoogfUZPhJ68= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=UxqwTtGPBngS9nDKkm/yP25EjkkCFqN0N3cwRZSkypY=; b=GKC5qhrAVErH+DJpE0hsoA7YsEVaSJKNklyKsMXHbvnyQWIDmVh+ruAZ/XQlM8zhhI GXCh2GeFYsXcd8Hr2nKotCcFq4Lkfd9xuqzH5ktwyKgycQjivSBAqJDOCstvGCZdM5XC dCDkesY1E6qzMTWx+hIip9oYMyc1srfo8aoEgnwjFxQrv+9Ilkn+wR2DhF7bTKEoxaz/ JEIQ+lvFdEjxs3buAprJRtfSuU37hV128CYGkYlwO6WK8Ow63GpPa+nQF/dWbxXYzt7W LLSAHU6BqYJKuV41OanmHGRJ4pyuCBEaIDais76yrCCe6UlrlXZ9GJizQtD0zJzjN7qU Y67A== X-Gm-Message-State: AKwxytc+x/3ZqeuEU/kVBOU0+iIZT0yV6B8KFEnxXpQWdt9eEr5QgTov 2ThpfvXDj3b0STGY82dxO8s9gFX3rQVFVgheD5cANQ== X-Received: by 10.202.104.135 with SMTP id o7mr11732413oik.296.1517538775842; Thu, 01 Feb 2018 18:32:55 -0800 (PST) MIME-Version: 1.0 Received: by 10.157.28.174 with HTTP; Thu, 1 Feb 2018 18:32:55 -0800 (PST) In-Reply-To: References: <2834309f69a1ec37b84a33f153a3d0b90336bcc6.1517453568.git.baolin.wang@linaro.org> <62ceed73b65399099ccd76fe6b7331bcd253b027.1517453569.git.baolin.wang@linaro.org> From: Baolin Wang Date: Fri, 2 Feb 2018 10:32:55 +0800 Message-ID: Subject: Re: [PATCH v2 2/2] gpio: Add GPIO driver for Spreadtrum SC9860 platform To: Andy Shevchenko Cc: Linus Walleij , Rob Herring , Mark Rutland , devicetree , Linux Kernel Mailing List , "open list:GPIO SUBSYSTEM" , Mark Brown Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1 February 2018 at 23:31, Andy Shevchenko wrote: > On Thu, Feb 1, 2018 at 5:04 AM, Baolin Wang wrote: >> The Spreadtrum SC9860 platform GPIO controller contains 16 groups and >> each group contains 16 GPIOs. Each GPIO can set input/output and has >> the interrupt capability. > > Just noticed couple of more improvements you can do. > >> + case IRQ_TYPE_EDGE_RISING: >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0); >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0); >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 1); >> + irq_set_handler_locked(data, handle_edge_irq); >> + break; >> + case IRQ_TYPE_EDGE_FALLING: >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0); >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0); >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 0); >> + irq_set_handler_locked(data, handle_edge_irq); >> + break; >> + case IRQ_TYPE_EDGE_BOTH: >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0); >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 1); >> + irq_set_handler_locked(data, handle_edge_irq); >> + break; >> + case IRQ_TYPE_LEVEL_HIGH: >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 1); >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0); >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 1); >> + irq_set_handler_locked(data, handle_level_irq); >> + break; >> + case IRQ_TYPE_LEVEL_LOW: >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 1); >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0); >> + sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 0); >> + irq_set_handler_locked(data, handle_level_irq); >> + break; >> + default: >> + return -EINVAL; > > I guess you can use fallthrough and reduce some lines, but I have no > strong opinion which will look better. Um, we need keep the sequence of updating registers and each irq type has different register updating. So I think current code can make things clear. > >> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); >> + sprd_gpio->base = devm_ioremap_nocache(&pdev->dev, res->start, >> + resource_size(res)); > > Didn't notice before, why not to simple call devm_ioremap_resource() ? Ah, you are correct, I missed devm_ioremap_resource(). Will change in next version. Thanks. -- Baolin.wang Best Regards