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[209.132.180.67]) by mx.google.com with ESMTP id l187si1410173pga.687.2018.02.02.05.55.55; Fri, 02 Feb 2018 05:56:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=ab2BtbVO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752026AbeBBNye (ORCPT + 99 others); Fri, 2 Feb 2018 08:54:34 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:37527 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751544AbeBBNya (ORCPT ); Fri, 2 Feb 2018 08:54:30 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w12DrPwq026275; Fri, 2 Feb 2018 07:53:25 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1517579605; bh=yLcJ8o8msAsoqyWrbIxfEFz0QYw0Ffy3MrCWS+b8tcE=; h=Subject:From:To:CC:References:Date:In-Reply-To; b=ab2BtbVOQH4Nt24sSH2H0dI2pd9kiONaS9YjKxblJW+ZXOjjisAyeUSdmlR3rxO91 utXotC9MAn94/8HzMMh+FkqQwD0F8hdAbz/iehvPF7XH9R0uNKhsb/k/lc4ZYkE2fx rp6nXHHpFoIjcefDhLHH+BLXrkOvlbkGkFjAIWWY= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w12DrPa8018343; Fri, 2 Feb 2018 07:53:25 -0600 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 2 Feb 2018 07:53:24 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 2 Feb 2018 07:53:24 -0600 Received: from [172.24.190.171] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w12DrKYU017899; Fri, 2 Feb 2018 07:53:21 -0600 Subject: Re: [PATCH v6 18/41] clk: davinci: New driver for TI DA8XX CFGCHIP clocks From: Sekhar Nori To: David Lechner , , , CC: Mark Rutland , Kevin Hilman , Michael Turquette , Stephen Boyd , , Bartosz Golaszewski , Rob Herring , Adam Ford References: <1516468460-4908-1-git-send-email-david@lechnology.com> <1516468460-4908-19-git-send-email-david@lechnology.com> Message-ID: <9f3640de-461e-de42-30ab-c1089f9dbc43@ti.com> Date: Fri, 2 Feb 2018 19:23:20 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday 02 February 2018 06:49 PM, Sekhar Nori wrote: > On Saturday 20 January 2018 10:43 PM, David Lechner wrote: >> +static const struct clk_ops da8xx_cfgchip_div4p5_clk_ops = { >> + .enable = da8xx_cfgchip_gate_clk_enable, >> + .disable = da8xx_cfgchip_gate_clk_disable, >> + .is_enabled = da8xx_cfgchip_gate_clk_is_enabled, > > I assume the reason for not using clk-gate.c is lack of regmap support > there? This is rather question for da8xx_cfgchip_gate_clk_ops. Sorry about the bad context. Thanks, Sekhar