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[209.132.180.67]) by mx.google.com with ESMTP id h10si1552615pgq.28.2018.02.02.06.43.18; Fri, 02 Feb 2018 06:43:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=dvY398WE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752330AbeBBOlC (ORCPT + 99 others); Fri, 2 Feb 2018 09:41:02 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:19843 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752077AbeBBOks (ORCPT ); Fri, 2 Feb 2018 09:40:48 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w12Edh5L021867; Fri, 2 Feb 2018 08:39:43 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1517582383; bh=pZa7yvIRUkA8a0CNcJnkRIYLSlbUi7dQkhA9tV9aTxU=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=dvY398WEMNVf3og2nVogWKxMF7GF1g6XLMd+7+kyfu7Y+L66ATQFExDRC1cALcxBH NXD6z7NDyhD95GWUbQB+aXwUKET+GdzF5QUBRRYfdUepecNvlSiGvOeRzYvynVfBx+ ClRPsZS+4+NxBKEX3BRJXHeD4HDZXpW36Evl8jpE= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w12Edhv3027603; Fri, 2 Feb 2018 08:39:43 -0600 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 2 Feb 2018 08:39:43 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 2 Feb 2018 08:39:43 -0600 Received: from [172.24.190.171] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w12EdbdT023482; Fri, 2 Feb 2018 08:39:38 -0600 Subject: Re: [PATCH v6 24/41] ARM: dm644x: add new clock init using common clock framework To: David Lechner , , , CC: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Adam Ford , References: <1516468460-4908-1-git-send-email-david@lechnology.com> <1516468460-4908-25-git-send-email-david@lechnology.com> From: Sekhar Nori Message-ID: <28508a72-2fc7-1dc2-8a2c-997139d70831@ti.com> Date: Fri, 2 Feb 2018 20:09:37 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <1516468460-4908-25-git-send-email-david@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Saturday 20 January 2018 10:44 PM, David Lechner wrote: > This adds the new board-specific clock init in mach-davinci/dm644x.c > using the new common clock framework drivers. > > The #ifdefs are needed to prevent compile errors until the entire > ARCH_DAVINCI is converted. > > Also clean up the #includes since we are adding some here. > > Signed-off-by: David Lechner I did not notice this before, but the subject line for this and other patches needs to be "ARM: davinci: " Apart from that: Reviewed-by: Sekhar Nori Thanks, Sekhar