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Message-ID: <1517603487.31953.76.camel@infradead.org>
Subject: Re: [PATCH v6 2/5] KVM: x86: Add IBPB support
From:   David Woodhouse <dwmw2@infradead.org>
To:     Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc:     KarimAllah Ahmed <karahmed@amazon.de>, kvm@vger.kernel.org,
        linux-kernel@vger.kernel.org, x86@kernel.org,
        Ashok Raj <ashok.raj@intel.com>,
        Asit Mallick <asit.k.mallick@intel.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Arjan Van De Ven <arjan.van.de.ven@intel.com>,
        Tim Chen <tim.c.chen@linux.intel.com>,
        Linus Torvalds <torvalds@linux-foundation.org>,
        Andrea Arcangeli <aarcange@redhat.com>,
        Andi Kleen <ak@linux.intel.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Dan Williams <dan.j.williams@intel.com>,
        Jun Nakajima <jun.nakajima@intel.com>,
        Andy Lutomirski <luto@kernel.org>,
        Greg KH <gregkh@linuxfoundation.org>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Peter Zijlstra <peterz@infradead.org>
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Date:   Fri, 02 Feb 2018 20:31:27 +0000
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On Fri, 2018-02-02 at 15:28 -0500, Konrad Rzeszutek Wilk wrote:
>=20
> >=C2=A0
> > No. The AMD feature bits give us more fine-grained support for exposing
> > IBPB or IBRS alone, so we expose those bits on Intel too.
>=20
> But but.. that runs smack against the idea of exposing a platform that
> is as close to emulating the real hardware as possible.
>=20
> As in I would never expect an Intel CPU to expose the IBPB on the 0x8000_=
0008
> leaf. Hence KVM (nor any hypervisor) should not do it either.
>=20
> Unless Intel is doing it? Did I miss a new spec update?

Are you telling me there's no way you can infer from CPUID that you're
running in a hypervisor?
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