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[209.132.180.67]) by mx.google.com with ESMTP id g33-v6si3914317plb.251.2018.02.03.07.51.46; Sat, 03 Feb 2018 07:52:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752714AbeBCPvH (ORCPT + 99 others); Sat, 3 Feb 2018 10:51:07 -0500 Received: from hermes.aosc.io ([199.195.250.187]:56463 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752628AbeBCPut (ORCPT ); Sat, 3 Feb 2018 10:50:49 -0500 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id 5961356231; Sat, 3 Feb 2018 15:50:41 +0000 (UTC) From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Linus Walleij Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v2 0/6] Initial Allwinner H6 support Date: Sat, 3 Feb 2018 23:49:36 +0800 Message-Id: <20180203154942.63566-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset adds initial support for the Allwinner H6 SoC. It's quite different from earlier Allwinner SoCs. For example, the memory map is refactored, and the CCU is rearranged. It's also the first Allwinner SoC with PCI Express interface, and the second one with USB 3.0 (the first one is A80). This patchset adds the most basical support for it, including the main pin controller, the main CCU and the basical device tree. Icenowy Zheng (6): pinctrl: sunxi: support pin controllers with holes among IRQ banks pinctrl: sunxi: add support for the Allwinner H6 main pin controller clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks clk: sunxi-ng: add support for the Allwinner H6 CCU arm64: allwinner: h6: add the basical Allwinner H6 DTSI file arm64: allwinner: h6: add support for Pine H64 board .../devicetree/bindings/clock/sunxi-ccu.txt | 1 + .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + arch/arm64/boot/dts/allwinner/Makefile | 1 + .../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 30 + arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 178 +++ drivers/clk/sunxi-ng/Kconfig | 5 + drivers/clk/sunxi-ng/Makefile | 1 + drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 1199 ++++++++++++++++++++ drivers/clk/sunxi-ng/ccu-sun50i-h6.h | 57 + drivers/clk/sunxi-ng/ccu_nkmp.c | 20 +- drivers/clk/sunxi-ng/ccu_nkmp.h | 2 + drivers/pinctrl/sunxi/Kconfig | 4 + drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 676 +++++++++++ drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c | 4 +- drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 4 +- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 16 +- drivers/pinctrl/sunxi/pinctrl-sunxi.h | 41 +- include/dt-bindings/clock/sun50i-h6-ccu.h | 125 ++ include/dt-bindings/reset/sun50i-h6-ccu.h | 74 ++ 20 files changed, 2414 insertions(+), 26 deletions(-) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-h6.c create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-h6.h create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c create mode 100644 include/dt-bindings/clock/sun50i-h6-ccu.h create mode 100644 include/dt-bindings/reset/sun50i-h6-ccu.h -- 2.15.1