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[209.132.180.67]) by mx.google.com with ESMTP id u4si5052676pgn.261.2018.02.04.22.06.26; Sun, 04 Feb 2018 22:07:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Fk38w7az; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752294AbeBEGCq (ORCPT + 99 others); Mon, 5 Feb 2018 01:02:46 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:50785 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750724AbeBEGCj (ORCPT ); Mon, 5 Feb 2018 01:02:39 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1561Tw1009697; Mon, 5 Feb 2018 00:01:29 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1517810489; bh=Jdm8axvip8VGCdaEDHPn/zcNciERVxL/zS+hOvEOOF0=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=Fk38w7az+q80HOB892G9bIp5FAS8Q/icBEF+1a8BmubGGXfGEJdIlrEyb2otAkuF5 M5hjwrCiioAsdYcTcgflYkwX2oSs+0Fjwl4MDFwNpoiMxPiEEX4aq6Kq/AiS6ZJA4/ hwShbqXn+rDpXBBKzJ6h1EdTL+r9+WjUL/Io+Klc= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1561Tif023727; Mon, 5 Feb 2018 00:01:29 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Mon, 5 Feb 2018 00:01:29 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Mon, 5 Feb 2018 00:01:29 -0600 Received: from [172.24.190.171] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1561Now003910; Mon, 5 Feb 2018 00:01:24 -0600 Subject: Re: [PATCH v6 24/41] ARM: dm644x: add new clock init using common clock framework To: David Lechner , , , CC: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Adam Ford , References: <1516468460-4908-1-git-send-email-david@lechnology.com> <1516468460-4908-25-git-send-email-david@lechnology.com> <28508a72-2fc7-1dc2-8a2c-997139d70831@ti.com> From: Sekhar Nori Message-ID: Date: Mon, 5 Feb 2018 11:31:22 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday 02 February 2018 11:36 PM, David Lechner wrote: > On 02/02/2018 08:39 AM, Sekhar Nori wrote: >> On Saturday 20 January 2018 10:44 PM, David Lechner wrote: >>> This adds the new board-specific clock init in mach-davinci/dm644x.c >>> using the new common clock framework drivers. >>> >>> The #ifdefs are needed to prevent compile errors until the entire >>> ARCH_DAVINCI is converted. >>> >>> Also clean up the #includes since we are adding some here. >>> >>> Signed-off-by: David Lechner >> >> I did not notice this before, but the subject line for this and other >> patches needs to be "ARM: davinci: " > > so "davinci" == "dm644x" and not any other SoC? No, I meant "ARM: davinci: dm644x: " instead of just "ARM: dm644x". Thanks, Sekhar