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[209.132.180.67]) by mx.google.com with ESMTP id j19-v6si6849596pll.799.2018.02.05.06.48.11; Mon, 05 Feb 2018 06:48:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PxVtpzXQ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753213AbeBEOrO (ORCPT + 99 others); Mon, 5 Feb 2018 09:47:14 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:51638 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753153AbeBEOq6 (ORCPT ); Mon, 5 Feb 2018 09:46:58 -0500 Received: by mail-wm0-f65.google.com with SMTP id r71so26761582wmd.1 for ; Mon, 05 Feb 2018 06:46:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=p1zs6vEwAq/LOFE+8oroRQB1spxTZP164eT6W2rmh64=; b=PxVtpzXQ5bjvJ2uQHaO3J7RwMDKu3eY/JBuC5V4FG3LBadl+XFku+/yfNRMoNnp3su zN/Ns5daL5y1X24x45OX/fqi8XoGkPiUlxVFLFbclrbYV+VXGMBug8Ns+6AgnHYl0xqb IdQgP5o+TjL4ogkgEBTbYn3BZWFqDG7RQ4cJA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=p1zs6vEwAq/LOFE+8oroRQB1spxTZP164eT6W2rmh64=; b=FC/+PK+N4VjwBy4UoQdy1TzDmfarWNYzHd0froEYRYtlC9GqvizE7+NTxgPKY9eqJK Jk1VJfygCoqct32wWHTIN0v/VFhrW/P0MHCUZ0AMxp2iIRI7rvkwFERdlWAGSJW3M2V8 DaT/WAK8k1Pdw21qA9k0xaVfu7h3oLEWrrBguzSj0VCvxsOD8gSsZYpFa0PVZgvLU8au Tg751yEJwSJguMtlZ+K0j3RtujXqtjDMcheeKFaqtc8f5Q54H3Wo6HzWH77DoqIVFUOd 2kSC7MsD5qyFtzMHqCzGXoykvbtfC7qh5cF7R//6QB+Y62l0GyVHYuq4DcerXvR0OUrB aPTg== X-Gm-Message-State: AKwxytd7vkRCjwUGOoHzo81eD93pfk2PmzYWFrDuEL+zGkf5ANCDpkYo MnRlD4Uh2obFo7hD9lqWkAQHoQ== X-Received: by 10.28.45.151 with SMTP id t145mr13632512wmt.129.1517842017717; Mon, 05 Feb 2018 06:46:57 -0800 (PST) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id r1sm8095849wmg.22.2018.02.05.06.46.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 Feb 2018 06:46:57 -0800 (PST) From: Georgi Djakov To: andy.gross@linaro.org Cc: bjorn.andersson@linaro.org, amit.kucheria@linaro.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Georgi Djakov Subject: [PATCH 4/4] arm64: dts: qcom: msm8916: Add CPU frequency scaling support Date: Mon, 5 Feb 2018 16:46:51 +0200 Message-Id: <20180205144651.5934-4-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180205144651.5934-1-georgi.djakov@linaro.org> References: <20180205144651.5934-1-georgi.djakov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a CPU OPP table to allow CPU frequency scaling on msm8916 platforms. Signed-off-by: Georgi Djakov --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 4539571a36b2..e4682779eec7 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -113,6 +113,8 @@ next-level-cache = <&L2_0>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; + clocks = <&apcs 0>; + operating-points-v2 = <&cpu_opp_table>; }; CPU1: cpu@1 { @@ -122,6 +124,8 @@ next-level-cache = <&L2_0>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; + clocks = <&apcs 0>; + operating-points-v2 = <&cpu_opp_table>; }; CPU2: cpu@2 { @@ -131,6 +135,8 @@ next-level-cache = <&L2_0>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; + clocks = <&apcs 0>; + operating-points-v2 = <&cpu_opp_table>; }; CPU3: cpu@3 { @@ -140,6 +146,8 @@ next-level-cache = <&L2_0>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; + clocks = <&apcs 0>; + operating-points-v2 = <&cpu_opp_table>; }; L2_0: l2-cache { @@ -212,6 +220,24 @@ }; + cpu_opp_table: cpu_opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + }; + opp-998400000 { + opp-hz = /bits/ 64 <998400000>; + }; + }; + gpu_opp_table: opp_table { compatible = "operating-points-v2";