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[209.132.180.67]) by mx.google.com with ESMTP id z15si5531098pgv.91.2018.02.05.06.48.34; Mon, 05 Feb 2018 06:48:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SarZNq0n; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753192AbeBEOrL (ORCPT + 99 others); Mon, 5 Feb 2018 09:47:11 -0500 Received: from mail-wr0-f194.google.com ([209.85.128.194]:44831 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753137AbeBEOq5 (ORCPT ); Mon, 5 Feb 2018 09:46:57 -0500 Received: by mail-wr0-f194.google.com with SMTP id v31so29846378wrc.11 for ; Mon, 05 Feb 2018 06:46:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=y/wCZFa2Lc3OXAPrvlB4/NLzAayIb4+kQIvMfLxZwxg=; b=SarZNq0nWA/GgqrnaFSHl0vcrwzngwRFBQ2gkuQfc1s7BxB+wCvz/4HGB5y/a1YPGZ ICEgAVM7MCxIr039OzqmIXNlU6JyyGDKbJa4te9CYRgSZSWQFU2WdyfZNITYjA4q4X+x 8Dwt7MaxIqFRYBNvoKJjMCpw4A/Bam1oHG7O4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=y/wCZFa2Lc3OXAPrvlB4/NLzAayIb4+kQIvMfLxZwxg=; b=E3yZD00CbDjB+5QvZZ4yHlxKcYUOGodyt3NyMj1LWojTw5ysqsYYs3mC9AiAxsDBjV 94F+2l8QuKYoO/E5+n7q1MtyirqC1TQ3HrVFA4X8JbHi3es5e27Y7opQ1V9xt2pzx/hF u7cvPSb4YottnWhSZRIAKcrG4lZopABtAAHmq/RrOO8bMfRKBm/vcpjXEUPCrjSaH3T4 cDAwBQ/3u5obb2URRKXkQlx/bAV27qFPti+GUZzvBltDImXXC3nMcK5uA4QNSP/kAd8z ewhh54cZ0axXb1Tlnfa9pOozaFzwailKkDBD9sMJ3POJOyd4XqMZg2JH+JkXwNDe9sNp LrhA== X-Gm-Message-State: AKwxytf77ihIA+ouJqsdjJ/Iw88m0jYsfwF4pYi2KGHU/bfUUHIzV7jb CBI9DTV1tYdM26sPFjlsF1WnMg== X-Received: by 10.223.154.208 with SMTP id a74mr33746323wrc.157.1517842016420; Mon, 05 Feb 2018 06:46:56 -0800 (PST) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id r1sm8095849wmg.22.2018.02.05.06.46.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 Feb 2018 06:46:55 -0800 (PST) From: Georgi Djakov To: andy.gross@linaro.org Cc: bjorn.andersson@linaro.org, amit.kucheria@linaro.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Georgi Djakov Subject: [PATCH 3/4] arm64: dts: qcom: msm8916: Add clock properties to the APCS node Date: Mon, 5 Feb 2018 16:46:50 +0200 Message-Id: <20180205144651.5934-3-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180205144651.5934-1-georgi.djakov@linaro.org> References: <20180205144651.5934-1-georgi.djakov@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are clock controller registers in the APCS block, which purpose is to control the main CPU mux and divider. Add the clock properties as part of the APCS device-tree node. Signed-off-by: Georgi Djakov --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5414f53a0fa1..4539571a36b2 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -336,6 +336,8 @@ compatible = "qcom,msm8916-apcs-kpss-global", "syscon"; reg = <0xb011000 0x1000>; #mbox-cells = <1>; + clocks = <&a53pll>; + #clock-cells = <0>; }; blsp1_uart2: serial@78b0000 {