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[209.132.180.67]) by mx.google.com with ESMTP id b9-v6si928687plm.172.2018.02.05.23.28.46; Mon, 05 Feb 2018 23:29:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752298AbeBFH2K (ORCPT + 99 others); Tue, 6 Feb 2018 02:28:10 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:6206 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752039AbeBFH2E (ORCPT ); Tue, 6 Feb 2018 02:28:04 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Mon, 05 Feb 2018 23:28:10 -0800 Received: from HQMAIL108.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 05 Feb 2018 23:28:03 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 05 Feb 2018 23:28:03 -0800 Received: from HQMAIL110.nvidia.com (172.18.146.15) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 6 Feb 2018 07:28:02 +0000 Received: from HQMAIL101.nvidia.com (172.20.187.10) by hqmail110.nvidia.com (172.18.146.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 6 Feb 2018 07:28:02 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1347.2 via Frontend Transport; Tue, 6 Feb 2018 07:28:02 +0000 Received: from mperttunen-lnx.Nvidia.com (Not Verified[10.21.26.144]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Mon, 05 Feb 2018 23:28:01 -0800 From: Mikko Perttunen To: , , , CC: , , , , , Mikko Perttunen Subject: [PATCH v2 0/7] Initial support for NVIDIA Tegra194 Date: Tue, 6 Feb 2018 09:22:30 +0200 Message-ID: <1517901757-15353-1-git-send-email-mperttunen@nvidia.com> X-Mailer: git-send-email 2.1.4 X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello everyone, this series adds initial support for the NVIDIA Tegra194 "Xavier" system-on-chip. Initially UART, I2C, SDMMC, as well as the PMIC are supported, allowing booting to a console. The changes consist almost completely of the new device trees, however some fixes are required in the BPMP driver to support the new channel layout in Tegra194. The series has been tested on Tegra186 (Jetson TX2) and Tegra194 (P2972). Cheers, Mikko Mikko Perttunen (7): firmware: tegra: Simplify channel management soc/tegra: Add Tegra194 SoC configuration option soc/tegra: pmc: Add Tegra194 compatibility string dt-bindings: tegra: Add missing chips and NVIDIA boards dt-bindings: tegra: Add documentation for nvidia,tegra194-pmc arm64: tegra: Add Tegra194 chip device tree arm64: tegra: Add device tree for the Tegra194 P2972-0000 board Documentation/devicetree/bindings/arm/tegra.txt | 16 + .../bindings/arm/tegra/nvidia,tegra186-pmc.txt | 2 + arch/arm64/boot/dts/nvidia/Makefile | 1 + arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 248 ++++++++ arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 16 + arch/arm64/boot/dts/nvidia/tegra194.dtsi | 342 +++++++++++ arch/arm64/configs/defconfig | 1 + drivers/firmware/tegra/bpmp.c | 142 ++--- drivers/soc/tegra/Kconfig | 10 + drivers/soc/tegra/pmc.c | 1 + include/dt-bindings/clock/tegra194-clock.h | 664 +++++++++++++++++++++ include/dt-bindings/gpio/tegra194-gpio.h | 59 ++ include/dt-bindings/power/tegra194-powergate.h | 49 ++ include/dt-bindings/reset/tegra194-reset.h | 166 ++++++ include/soc/tegra/bpmp.h | 4 +- 15 files changed, 1641 insertions(+), 80 deletions(-) create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts create mode 100644 arch/arm64/boot/dts/nvidia/tegra194.dtsi create mode 100644 include/dt-bindings/clock/tegra194-clock.h create mode 100644 include/dt-bindings/gpio/tegra194-gpio.h create mode 100644 include/dt-bindings/power/tegra194-powergate.h create mode 100644 include/dt-bindings/reset/tegra194-reset.h -- 2.1.4