Received: by 10.223.176.5 with SMTP id f5csp351070wra;
        Mon, 5 Feb 2018 23:30:47 -0800 (PST)
X-Google-Smtp-Source: AH8x224RAFZISHghfKk8lTcAMBmjuBZPG3VAGjNrLfB8Yle5mTBhVF+GpySioqqr6vORWj8KVqy/
X-Received: by 2002:a17:902:8a91:: with SMTP id p17-v6mr1501526plo.375.1517902247694;
        Mon, 05 Feb 2018 23:30:47 -0800 (PST)
ARC-Seal: i=1; a=rsa-sha256; t=1517902247; cv=none;
        d=google.com; s=arc-20160816;
        b=AzLMK4UzSu5aIgWYQDXo5FeA6DAjeXieZv4jo3iybhRCpsQ2Cx4WMQQKfpX7PmsMiJ
         ydWy6xVyVV0KNceou4VeP+wAgwUcw2qaeHctBxSSgpc4wEHyFwQIYP41bSVn6ho4OD2E
         l5FHTbxUgwuIZLZuk6fwD0EimpFaoKxkyHBsY6lqmg8ssp64kmqvIWdzBEnn0Kp1H6AH
         tJf2CGahxarDyBr5OPU927GKzZY90g2qy/zXBeuseS1S+WIGcWLLnUJN8mLskaKiTWPG
         a5hAaW80gVvYhDvDk2O7OyPyYD9Hlrk8DtZ54KBykDRuohFhhYvRbcRK2+khvoxVNg/7
         0Rmw==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:mime-version:references:in-reply-to
         :message-id:date:subject:cc:to:from:arc-authentication-results;
        bh=Ycnsakl39Tqet0/cdK4tqT9bfA5ziiJFlFKfCZCHtBg=;
        b=p5IOdFxGBgCsitp9P7+qp7tAefEhEX7okn6yZG5kWkvtQYPEA56AYYckCzzPd8ta9K
         bw9fKkUZVh4IgJ+7hxXgI/y5vSi41tGLAo83VFcGzBG1MVPLFsUmzQUByQSvbBuIh573
         J5Io4vKQ8Jn52BSuC2CfT3s7FOluL7RL6ZA/SmEpP4BctOZHg6aZvFXu+Lcwsk6EUKLa
         33FqfWaVg7DOKDkMbtt+qLmFcSvJF2ZaliNKdZAPxNFcv5yaFcKT7QrAjzHar6UeN2Lf
         oKovl5Jc8HCB9CQvSl8xaRE/KrqIqtBQzyGo/m9RQ2Ph5TiJnaI+0S3KwFV69yw8tw41
         3yBA==
ARC-Authentication-Results: i=1; mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67])
        by mx.google.com with ESMTP id b20-v6si3811190pls.249.2018.02.05.23.30.32;
        Mon, 05 Feb 2018 23:30:47 -0800 (PST)
Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Authentication-Results: mx.google.com;
       spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1752213AbeBFH3Z (ORCPT <rfc822;noahbdev@gmail.com> + 99 others);
        Tue, 6 Feb 2018 02:29:25 -0500
Received: from hqemgate16.nvidia.com ([216.228.121.65]:12595 "EHLO
        hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1752356AbeBFH2Q (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Tue, 6 Feb 2018 02:28:16 -0500
Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com
        id <B5a79591a0002>; Mon, 05 Feb 2018 23:28:26 -0800
Received: from HQMAIL104.nvidia.com ([172.20.161.6])
  by hqpgpgate101.nvidia.com (PGP Universal service);
  Mon, 05 Feb 2018 23:28:15 -0800
X-PGP-Universal: processed;
        by hqpgpgate101.nvidia.com on Mon, 05 Feb 2018 23:28:15 -0800
Received: from HQMAIL106.nvidia.com (172.18.146.12) by HQMAIL104.nvidia.com
 (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 6 Feb
 2018 07:28:14 +0000
Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL106.nvidia.com
 (172.18.146.12) with Microsoft SMTP Server id 15.0.1347.2 via Frontend
 Transport; Tue, 6 Feb 2018 07:28:14 +0000
Received: from mperttunen-lnx.Nvidia.com (Not Verified[10.21.26.144]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121)
        id <B5a79590c0001>; Mon, 05 Feb 2018 23:28:14 -0800
From:   Mikko Perttunen <mperttunen@nvidia.com>
To:     <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
        <robh+dt@kernel.org>, <mark.rutland@arm.com>
CC:     <talho@nvidia.com>, <linux-tegra@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
        Mikko Perttunen <mperttunen@nvidia.com>
Subject: [PATCH v2 5/7] dt-bindings: tegra: Add documentation for nvidia,tegra194-pmc
Date:   Tue, 6 Feb 2018 09:22:35 +0200
Message-ID: <1517901757-15353-6-git-send-email-mperttunen@nvidia.com>
X-Mailer: git-send-email 2.1.4
In-Reply-To: <1517901757-15353-1-git-send-email-mperttunen@nvidia.com>
References: <1517901757-15353-1-git-send-email-mperttunen@nvidia.com>
X-NVConfidentiality: public
MIME-Version: 1.0
Content-Type: text/plain
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

The Tegra194 power management controller has one additional register
aperture to be specified in the device tree node.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
index 078a58b0302f..5a3bf7c5a7a0 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
@@ -3,6 +3,7 @@ NVIDIA Tegra Power Management Controller (PMC)
 Required properties:
 - compatible: Should contain one of the following:
   - "nvidia,tegra186-pmc": for Tegra186
+  - "nvidia,tegra194-pmc": for Tegra194
 - reg: Must contain an (offset, length) pair of the register set for each
   entry in reg-names.
 - reg-names: Must include the following entries:
@@ -10,6 +11,7 @@ Required properties:
   - "wake"
   - "aotag"
   - "scratch"
+  - "misc" (Only for Tegra194)
 
 Optional properties:
 - nvidia,invert-interrupt: If present, inverts the PMU interrupt signal.
-- 
2.1.4