Received: by 10.223.176.5 with SMTP id f5csp465394wra; Tue, 6 Feb 2018 01:56:48 -0800 (PST) X-Google-Smtp-Source: AH8x224aJSDAj3nGrzAWeD93SsfdAIv8FSsl923rQ4/KR0pVI4gxu30ONGtti3b1DEL/ARgwH8kk X-Received: by 10.99.149.8 with SMTP id p8mr1468887pgd.186.1517911008868; Tue, 06 Feb 2018 01:56:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517911008; cv=none; d=google.com; s=arc-20160816; b=Th0G+bfaZkUqtU/Awn92x/0kvddpq2K7Vc57KyZd2UiNIEkuGM36fW243WPlo8WjFV A+dDBSqK4wESHxvKIVk7tSbTj/w8Y1ZYiIOv5pHrh13tU66nr8lzxqv3tKWi28oVlazS iseUWpgoOCWbdwmGG8Cn2vdlek/KPsNeAiG8zONsPlI8+i0s6OafUzsirMAZoK3wVldQ M37OHTd2OAadVAaO6Iu6QtCYDWSZz2dx8piz9Eoyt4JGfcpBZ96jhghf7wXvlS1mtpbj 1zN+Dk0qUpdnfneQZWj7ly2H4e845sI4UWW8NmNcwG/YE3uNopeo5IEej4mGszz0T0D0 qOUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=X65QyGfN9KXTj3Le/aArGTMDuIXT8gXLqhJF2w8zCx8=; b=GlE3sfoKnO2YNidX3h0LI9wvTNAljGHOZZF3QHBue9746XuotuiAvlu7Dip2fbm1KZ CafWE77mifHlv0DQW4+rxAozc7FJHoo8cnwMrssrPSlGqpDec8mBIz2wUKuAVK3vUfRp 0OcUW/ElkbqaafmKHCDdm6oTxa+Lg8/zJcYRYogLMVlIu12nPkJh8gxUyxuyMo93PCPR +yDAsj0UCCOcRbbsfoK4DUfciPGojrTU8fLfPFtFc7pioCkbg5u0UMdriwW/Y3wZ9Nav uSJv8RVIrTD/2bWJR0qWbgNJ09egVo1osEqh6OJPt2Wilxp2CZ69/BuitHeFMwIGviBW dMHA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z127si1506353pgb.74.2018.02.06.01.56.34; Tue, 06 Feb 2018 01:56:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752723AbeBFJxd (ORCPT + 99 others); Tue, 6 Feb 2018 04:53:33 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:39713 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752640AbeBFJxT (ORCPT ); Tue, 6 Feb 2018 04:53:19 -0500 X-UUID: 64320c3eeee7406cb9cf5fc2fbb863ca-20180206 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1462666327; Tue, 06 Feb 2018 17:53:16 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 6 Feb 2018 17:53:15 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 6 Feb 2018 17:53:15 +0800 From: To: , , , , CC: , , Sean Wang Subject: [PATCH v2 03/16] arm64: dts: mt7622: add power domain controller device nodes Date: Tue, 6 Feb 2018 17:52:52 +0800 Message-ID: <7f68b0b408401e36e120660009065fa5d9d38fc4.1517910489.git.sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sean Wang add power domain controller nodes Signed-off-by: Sean Wang Cc: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 73e5d62..81207e6 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include #include / { @@ -109,6 +110,20 @@ #reset-cells = <1>; }; + scpsys: scpsys@10006000 { + compatible = "mediatek,mt7622-scpsys", + "syscon"; + #power-domain-cells = <1>; + reg = <0 0x10006000 0 0x1000>; + interrupts = , + , + , + ; + infracfg = <&infracfg>; + clocks = <&topckgen CLK_TOP_HIF_SEL>; + clock-names = "hif_sel"; + }; + sysirq: interrupt-controller@10200620 { compatible = "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq"; -- 2.7.4