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[209.132.180.67]) by mx.google.com with ESMTP id p12si7198774pgn.523.2018.02.06.10.10.15; Tue, 06 Feb 2018 10:10:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=Bbt1TKU2; dkim=pass header.i=@codeaurora.org header.s=default header.b=Bbt1TKU2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752780AbeBFSJc (ORCPT + 99 others); Tue, 6 Feb 2018 13:09:32 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:39570 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752481AbeBFSJ1 (ORCPT ); Tue, 6 Feb 2018 13:09:27 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A64BC6090E; Tue, 6 Feb 2018 18:09:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1517940566; bh=kpFVVXYx2UGjiYwoUPRFSGTqs0BDBM8LuPkwIi6jdWw=; h=From:To:Cc:Subject:Date:From; b=Bbt1TKU2B6+b4TrtnperxAJC9JxHpoOFFMIPOhKLf7/cXIw8tWiOeB1oWcKC+XD05 o7swbAnhNjh+U3Q7NIhDRs5VcRN9vvMe9FmwaHIt46YlGMPYkLn2yflJ4/KQPymn8A zBQ7p5YXycsszUmJtkYmmtPPFMNyp9fOzIItrJnc= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilina@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4D3CA60272; Tue, 6 Feb 2018 18:09:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1517940566; bh=kpFVVXYx2UGjiYwoUPRFSGTqs0BDBM8LuPkwIi6jdWw=; h=From:To:Cc:Subject:Date:From; b=Bbt1TKU2B6+b4TrtnperxAJC9JxHpoOFFMIPOhKLf7/cXIw8tWiOeB1oWcKC+XD05 o7swbAnhNjh+U3Q7NIhDRs5VcRN9vvMe9FmwaHIt46YlGMPYkLn2yflJ4/KQPymn8A zBQ7p5YXycsszUmJtkYmmtPPFMNyp9fOzIItrJnc= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 4D3CA60272 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilina@codeaurora.org From: Lina Iyer To: tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, rnayak@codeaurora.org, asathyak@codeaurora.org, Lina Iyer Subject: [PATCH v3 0/2] irqchip: qcom: add support for PDC interrupt controller Date: Tue, 6 Feb 2018 11:09:03 -0700 Message-Id: <20180206180905.29047-1-ilina@codeaurora.org> X-Mailer: git-send-email 2.15.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Changes since RFC v2: - Fixed up DT probe based on suggestions from Thomas and Marc - Code clean up as suggested by Thomas - Switch to SPDX license marker - Dropped the FTRACE patch for now, will need more thought and discussions On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a power domain that can be powered off when not needed. Interrupts that need to be sensed even when the GIC is powered off, are routed through an interrupt controller in an always-on domain called the Power Domain Controller a.k.a PDC. This series adds support for the PDC's interrupt controller. Please consider reviewing these patches. RFC v1: https://patchwork.kernel.org/patch/10180857/ RFC v2: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1600634.html Lina Iyer (2): drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs dt-bindings/interrupt-controller: pdc: descibe PDC device binding .../bindings/interrupt-controller/qcom,pdc.txt | 80 ++++++ drivers/irqchip/Kconfig | 9 + drivers/irqchip/Makefile | 1 + drivers/irqchip/qcom-pdc.c | 302 +++++++++++++++++++++ 4 files changed, 392 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt create mode 100644 drivers/irqchip/qcom-pdc.c -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project