Received: by 10.223.176.5 with SMTP id f5csp274512wra; Tue, 6 Feb 2018 22:17:53 -0800 (PST) X-Google-Smtp-Source: AH8x2245b2y88BOwY7/v6tscpTw2v5Ddf3ikXeAjVqkC1j/9lTd5vXN6Bm1Y2Feb0p5ZZRS9i8dw X-Received: by 2002:a17:902:d83:: with SMTP id 3-v6mr4931792plv.82.1517984273741; Tue, 06 Feb 2018 22:17:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517984273; cv=none; d=google.com; s=arc-20160816; b=aUn10OLRGvkp0fV1ZrPfqdCTa4fuY9utt6CNfw77hdQYybNFGIpL4jw9K8gWBlVX6x 1Q7+41eFXo6tn8M7vYnkwoxSSwOr1QW3w2kphlwkK22e3Lh3bBm8J5vD0VhbB/055p3E wLKbHzFiyrzdaKgkeuA6NON+Wqh7zu2EIoSD1Hvd4syXVkP5Dp9VA/hMEcvgaZiE56Ca EzAC8R+EQf9kqo3gm6PXVsMV603LWIzdJNbX7qS/yX7cJKus9tA/FScsK7ZdUnlGLKt1 RXBzRYWx2nVacLUTgpQTGmjU5CadxQkj2i8FI21PNkz5fQpcAD9rEXyVmlDEwk58vfFg TiNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:content-transfer-encoding :references:in-reply-to:date:cc:to:from:subject:message-id :arc-authentication-results; bh=LUWoQYp7VqS4p/jTPdy2OAtF3uWfWvxchlo8dCuw0gw=; b=nSRMNBZ865HpYvOtnDAtCfhHeEqKHw/GilS/V8K2pfmACMZF0uZW1g8X9iZwqQaRQC bTbNfMfbbG1tuxYsE9BzqTQCMgWvO6kPRuTprjFjzC5wAH/WnGl++syRgRVYKYb7+Cd6 CxLwFfs+fW1ng0qyr+KHO3Hb5YL5q4TfmmCfDxRMlj7+SNSNVfLWoF54PesBdq9kgTo0 T9UiOmoiimEbrY+1iHMUaipLCRIISaTZOQURGI1lSVleW8mR9kHMs3MChfTygGowgOPu Jd555YqUYM6zxZJdY/Jr9saGc4QHZjKBtUzFglcQGl5Mil+rrobv/7piBquL9Rsm1XNh /Dew== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r17si519393pge.478.2018.02.06.22.17.26; Tue, 06 Feb 2018 22:17:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752952AbeBGGQY (ORCPT + 99 others); Wed, 7 Feb 2018 01:16:24 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:35757 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751095AbeBGGQW (ORCPT ); Wed, 7 Feb 2018 01:16:22 -0500 X-UUID: df98719923b04c8999e458b3a7601095-20180207 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 2129930630; Wed, 07 Feb 2018 14:16:19 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Wed, 7 Feb 2018 14:16:18 +0800 Received: from [172.21.77.33] (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Wed, 7 Feb 2018 14:16:18 +0800 Message-ID: <1517984178.9025.2.camel@mtkswgap22> Subject: Re: [PATCH v2 06/16] arm64: dts: mt7622: add cpufreq related device nodes From: Sean Wang To: Viresh Kumar CC: , , , , , , Date: Wed, 7 Feb 2018 14:16:18 +0800 In-Reply-To: <20180207033331.GK28462@vireshk-i7> References: <20180207033331.GK28462@vireshk-i7> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2018-02-07 at 09:03 +0530, Viresh Kumar wrote: > On 06-02-18, 17:52, sean.wang@mediatek.com wrote: > > cpus { > > #address-cells = <2>; > > #size-cells = <0>; > > @@ -26,6 +70,10 @@ > > device_type = "cpu"; > > compatible = "arm,cortex-a53", "arm,armv8"; > > reg = <0x0 0x0>; > > + clocks = <&infracfg CLK_INFRA_MUX1_SEL>, > > + <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>; > > + clock-names = "cpu", "intermediate"; > > + operating-points-v2 = <&cpu_opp_table>; > > enable-method = "psci"; > > clock-frequency = <1300000000>; > > }; > > @@ -34,6 +82,7 @@ > > device_type = "cpu"; > > compatible = "arm,cortex-a53", "arm,armv8"; > > reg = <0x0 0x1>; > > + operating-points-v2 = <&cpu_opp_table>; > > enable-method = "psci"; > > clock-frequency = <1300000000>; > > }; > > Sorry for not picking this earlier, but you should probably add the same clock > related properties for both cpu nodes here. Things will break if CPU1 is used by > the cpufreq core to bring the cpufreq policy online. > > This can happen if cpufreq driver is a module, CPU0 is hotplugged out and then > the cpufreq driver is inserted. > mt7622 cpu0 does not support hotplug. do I still need to add same clock related properties for both cpu nodes here?