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[209.132.180.67]) by mx.google.com with ESMTP id w18-v6si1098861pll.186.2018.02.07.05.49.27; Wed, 07 Feb 2018 05:49:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=YengfMgm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754353AbeBGNrL (ORCPT + 99 others); Wed, 7 Feb 2018 08:47:11 -0500 Received: from mail-wr0-f196.google.com ([209.85.128.196]:44212 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754187AbeBGNqL (ORCPT ); Wed, 7 Feb 2018 08:46:11 -0500 Received: by mail-wr0-f196.google.com with SMTP id v31so1074405wrc.11 for ; Wed, 07 Feb 2018 05:46:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ysV1A8ouLt8V8/Pa9QqJ99ymNcUmrfag6KQ6okPYChI=; b=YengfMgmPxxVTl8D1muosgv9yNrxFaVJuj9m1iWSZxioT0XAeWgiuiW2taxgprLTI+ iTrmqmx8myHacbBhaQrG7QkUKukse0wNABOIWCIscNvl+squ22DlTWaCFbPdvRTgSonk wobEvUo4Z9WtXmMun/niZgwkyEf6xSeojudlKxvEnuAxXPc9yZQ7fDCfAJTRzu+CGCsn t2HQlaaS+hBA1+y6spLdRIT7fwuuEfk0cn7mfoNxCKEGaKg7OB+SXaNOtdLrhmo1Yp9g +VRfMuniwuBjPGxtPDEgD44GU/lHDcgq0EGtWRbt9pw93s4a2fgycc2PA/N7fQV19FAH EfCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ysV1A8ouLt8V8/Pa9QqJ99ymNcUmrfag6KQ6okPYChI=; b=lXwdndDn0aRxXbiX308no9IAaC6O9sdyXWrA/LzrKvhmyyQjHOrWMFbl3GmhE9ebXh FnC7uTPn6gSG7MiEhvTCqfDnfe7WewbX28umv6alyackQUM6aiU7T33dcRUcM9cgJnul UKMfMVm0tlUoEwKbcDeIOFfPeIp2YRey1NP86kzF3Cp0gHN2qzOBUgi23oyZ6N56vpFl V/xcYIR88p4znnISl7liowN9nLE1rs2ciE4m1mBXkov3Dj+47XpRdDObvVFyJxL1Mn0U m2zipOQ+t9eX9KZwGcjYgnnl1LlTvWxurvS+e7oJRB0GY/O4BFY6JtYnG/ET8pLI5rdI ZmzA== X-Gm-Message-State: APf1xPCeMmtHF74x7T0TzNDNF7oS8Qrbt0+Xa5rw/GZ3FwuL3QsjwV/T CQlpCM/acdpe9hwKGAaRmJqH/Q== X-Received: by 10.223.157.135 with SMTP id p7mr6103253wre.34.1518011169932; Wed, 07 Feb 2018 05:46:09 -0800 (PST) Received: from brgl-bgdev.baylibre.local ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id 62sm1336371wrg.81.2018.02.07.05.46.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Feb 2018 05:46:09 -0800 (PST) From: Bartosz Golaszewski To: Rob Herring , Mark Rutland , Sekhar Nori , Kevin Hilman , Russell King , David Lechner Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Bartosz Golaszewski Subject: [PATCH 4/7] ARM: dts: da850: add power controller nodes Date: Wed, 7 Feb 2018 14:45:50 +0100 Message-Id: <20180207134553.13510-5-brgl@bgdev.pl> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180207134553.13510-1-brgl@bgdev.pl> References: <20180207134553.13510-1-brgl@bgdev.pl> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski Add two power controller nodes corresponding with the two PSC modules present on the da850 SoC. Signed-off-by: Bartosz Golaszewski --- arch/arm/boot/dts/da850.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi index 3a1f2ced05ca..ac2eef4e6b7c 100644 --- a/arch/arm/boot/dts/da850.dtsi +++ b/arch/arm/boot/dts/da850.dtsi @@ -24,6 +24,11 @@ }; }; + aliases { + pwc0 = &pwc0; + pwc1 = &pwc1; + }; + opp_table: opp-table { compatible = "operating-points-v2"; @@ -141,6 +146,10 @@ "pll0_sysclk4", "pll0_sysclk6", "async1"; }; + pwc0: power-controller@10000 { + compatible = "ti,davinci-pm-domains"; + #power-domain-cells = <0>; + }; pll0: clock-controller@11000 { compatible = "ti,da850-pll0"; reg = <0x11000 0x1000>; @@ -757,6 +766,10 @@ <&async3_clk>; clock-names = "pll0_sysclk2", "pll0_sysclk4", "async3"; }; + pwc1: power-controller@227000 { + compatible = "ti,davinci-pm-domains"; + #power-domain-cells = <0>; + }; pinconf: pin-controller@22c00c { compatible = "ti,da850-pupd"; reg = <0x22c00c 0x8>; -- 2.16.1