Received: by 10.223.176.5 with SMTP id f5csp1101731wra; Wed, 7 Feb 2018 12:43:01 -0800 (PST) X-Google-Smtp-Source: AH8x227D8RFR1bFJ5UeA/Uw19Con+m/h1g0I2dkl/Eohye4ZLeeuEwIMnHeaQXP6iy133q5i8Jx2 X-Received: by 10.99.153.1 with SMTP id d1mr5946444pge.190.1518036180899; Wed, 07 Feb 2018 12:43:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518036180; cv=none; d=google.com; s=arc-20160816; b=x9jTkUgWtKv19BqhUyXlHHKeMvZukkFOeZ3FNgrx0GvBCYTypdP31Liom/SADpqJ6c p46GKh1dNj077wSOqByn3vRIUVu/e00HggdkYLELf6WoatuLrhNJrFPD7/sSAgxoHR8G /JG+15AJppFDfc+9qGRJq1yZv36ALV21jxkBd4LBw5gWZ/J+XGSnbNoVvEnV4512rCyl 2h/ZUgGbtElefluPx/AeyMDtZxn68HbbNP1kKYD391z4yHi6sF0vKjYQvJ4+ex4wveXC lAD9wRsL0mhrFcUzFst5pTsC+pMWP64nf3uNFa4eKbqvkvFrN8YTbzmtE8RREf7SInfu +IaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:cc:to:subject :message-id:date:from:references:in-reply-to:mime-version :dkim-signature:arc-authentication-results; bh=lehONcvNp8hCA5ThyQ27RlanCpCXMZ7MZY+MiaoLIh4=; b=TjYCVud5BChudeBPaf6dpnQMyIOH06IITOO9ahiysKv5vjD+jfiKo4JaY7rcY7N6xa mpd9l7/aalmJoHxELw86pHSE9CHu1FU7IiF3nf4iC3e5e7S+sKsiQMExnktFxkxBHmeW pxq+PX3E5L1ASfW8uq/5dZ2qP+52qMZvWpFnUY/dLxu/l4vC4/ihoGXZ7DxzqVEcBeaV zrSYOqoq7NcATp3IiL4lkOpG5xvOzCf/kkKyY/K0L7GaAFPALoRCL7y0bxJVVIk2VyBZ gulkf0JYwJFWNyfuutWKxyRC3ThADJIDNkND0gEmz1SORZjXXYZ6YxFB03dplyh6uDGC 7irQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=JboK7EFs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v201si244710pgb.433.2018.02.07.12.42.46; Wed, 07 Feb 2018 12:43:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=JboK7EFs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754438AbeBGUmH (ORCPT + 99 others); Wed, 7 Feb 2018 15:42:07 -0500 Received: from mail-io0-f194.google.com ([209.85.223.194]:41569 "EHLO mail-io0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754087AbeBGUmG (ORCPT ); Wed, 7 Feb 2018 15:42:06 -0500 Received: by mail-io0-f194.google.com with SMTP id f4so3422702ioh.8 for ; Wed, 07 Feb 2018 12:42:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=lehONcvNp8hCA5ThyQ27RlanCpCXMZ7MZY+MiaoLIh4=; b=JboK7EFshviaF642NtWaftkpikObyfqMoyp7geAqOG8Hsk1Yx8DYbnjFij8X1RaM6E I9LYibGiV+6CU+JiRBVzSX3g6EiLWsh0p4cyGpfrmMpeA8/e7qEq/hRf/6sJEMZXRnY/ UdV83V/azw+Ab2FLJQxwg834a2/16QKdHPesMLg5vsFS3uo2yTrIIpt21soUm3KDVCua rCsxCgm8oboPcop/vTwmedxQJroAtqKDCcjYL/6qtB3ghfjxE0tgL0X8xR+E93yqNKSj yZc8M+qk4X20Ci3y+03tYHsMxgncIU9YLtKxyT4vTaAWIhuvSG8LJTZ1IGG1elPlWMsD 7Vdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=lehONcvNp8hCA5ThyQ27RlanCpCXMZ7MZY+MiaoLIh4=; b=j3M/L8I3vhNtmn3q7BTkspCjsgR82Fusy/5axQVuDvLm+s4LULSR2szlNgELnI7AXF F0pjreo1miFNPqp0et9iKU1hjRM83/D/xiYNPuxMMLVhZZRtxUONJaPnWUImY8M1xMBC rMFsyAgSe4QBMC4jezXbBoRc8rD7R+n0Ysmy1Pzc9uur4RY6kmFQKNXo5izXt8DwicNn gCMlftujc4eBpgUXWhje7Nc9rLtc6hTn4FK20dFrhk/vTBNSSD7FFXO6Z+B/VsVe5T2c xwBkf2sx9sCa1fZJWY9P9KW9x4BlejNTOeNyqL+85ThBbX2f+NEcIFcuY97rp2W/E9tM 4jEg== X-Gm-Message-State: APf1xPD41ubJUJN9Uy4yaNGhUpJHLn29gOuLWXsBtGwe1WPSSOeSpzeY IuXMLToENWXq+miZkW6nzBnTkA+F4Y6G0IOWucNpfw== X-Received: by 10.107.162.147 with SMTP id l141mr9623742ioe.1.1518036125299; Wed, 07 Feb 2018 12:42:05 -0800 (PST) MIME-Version: 1.0 Received: by 10.2.168.134 with HTTP; Wed, 7 Feb 2018 12:42:04 -0800 (PST) In-Reply-To: <20180207194928.93869-1-mka@chromium.org> References: <20180207194928.93869-1-mka@chromium.org> From: Guenter Roeck Date: Wed, 7 Feb 2018 12:42:04 -0800 Message-ID: Subject: Re: [PATCH] drm/amd/display: Remove extra pairs of parentheses in dce_calcs.c To: Matthias Kaehlcke Cc: Alex Deucher , =?UTF-8?Q?Christian_K=C3=B6nig?= , David Zhou , David Airlie , Harry Wentland , Tony Cheng , Dmytro Laktyushkin , Joshua Aberback , amd-gfx list , Maling list - DRI developers , linux-kernel , Guenter Roeck , Justin TerAvest , Craig Bergstrom Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 7, 2018 at 11:49 AM, Matthias Kaehlcke wrote= : > The double parentheses are not needed. Removing them fixes multiple > warnings like this when building with clang: > > drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:617:42: > error: equality comparison with extraneous parentheses > [-Werror,-Wparentheses-equality] > if ((data->graphics_micro_tile_mode =3D=3D bw_def_rotated_micro_tiling)= ) { > > Signed-off-by: Matthias Kaehlcke Reviewed-by: Guenter Roeck > --- > drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c | 22 +++++++++++-------= ---- > 1 file changed, 11 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c b/drivers/g= pu/drm/amd/display/dc/calcs/dce_calcs.c > index 2e11fac2a63d..bb03a9c64d5a 100644 > --- a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c > +++ b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c > @@ -623,7 +623,7 @@ static void calculate_bandwidth( > } > else { > /*graphics portrait tiling mode*/ > - if ((data->graphics_micro_tile_mo= de =3D=3D bw_def_rotated_micro_tiling)) { > + if (data->graphics_micro_tile_mod= e =3D=3D bw_def_rotated_micro_tiling) { > data->orthogonal_rotation= [i] =3D 0; > } > else { > @@ -634,7 +634,7 @@ static void calculate_bandwidth( > else { > if ((i < 4)) { > /*underlay landscape tiling mode = is only supported*/ > - if ((data->underlay_micro_tile_mo= de =3D=3D bw_def_display_micro_tiling)) { > + if (data->underlay_micro_tile_mod= e =3D=3D bw_def_display_micro_tiling) { > data->orthogonal_rotation= [i] =3D 0; > } > else { > @@ -643,7 +643,7 @@ static void calculate_bandwidth( > } > else { > /*graphics landscape tiling mode*= / > - if ((data->graphics_micro_tile_mo= de =3D=3D bw_def_display_micro_tiling)) { > + if (data->graphics_micro_tile_mod= e =3D=3D bw_def_display_micro_tiling) { > data->orthogonal_rotation= [i] =3D 0; > } > else { > @@ -947,14 +947,14 @@ static void calculate_bandwidth( > } > for (i =3D 0; i <=3D maximum_number_of_surfaces - 1; i++) { > if (data->enable[i]) { > - if ((data->number_of_displays =3D=3D 1 && data->n= umber_of_underlay_surfaces =3D=3D 0)) { > + if (data->number_of_displays =3D=3D 1 && data->nu= mber_of_underlay_surfaces =3D=3D 0) { > /*set maximum chunk limit if only one gra= phic pipe is enabled*/ > data->outstanding_chunk_request_limit[i] = =3D bw_int_to_fixed(127); > } > else { > data->outstanding_chunk_request_limit[i] = =3D bw_ceil2(bw_div(data->adjusted_data_buffer_size[i], data->pipe_chunk_si= ze_in_bytes[i]), bw_int_to_fixed(1)); > /*clamp maximum chunk limit in the graphi= c display pipe*/ > - if ((i >=3D 4)) { > + if (i >=3D 4) { > data->outstanding_chunk_request_l= imit[i] =3D bw_max2(bw_int_to_fixed(127), data->outstanding_chunk_request_l= imit[i]); > } > } > @@ -1337,7 +1337,7 @@ static void calculate_bandwidth( > /*if stutter and dram clock state change are gated before cursor = then the cursor latency hiding does not limit stutter or dram clock state c= hange*/ > for (i =3D 0; i <=3D maximum_number_of_surfaces - 1; i++) { > if (data->enable[i]) { > - if ((dceip->graphics_lb_nodownscaling_multi_line_= prefetching =3D=3D 1)) { > + if (dceip->graphics_lb_nodownscaling_multi_line_p= refetching =3D=3D 1) { > data->maximum_latency_hiding[i] =3D bw_ad= d(data->minimum_latency_hiding[i], bw_mul(bw_frc_to_fixed(8, 10), data->tot= al_dmifmc_urgent_latency)); > } > else { > @@ -1396,7 +1396,7 @@ static void calculate_bandwidth( > } > /*determine the number of displays with margin to switch in the v= _active region*/ > for (k =3D 0; k <=3D maximum_number_of_surfaces - 1; k++) { > - if ((data->enable[k] =3D=3D 1 && data->display_pstate_cha= nge_enable[k] =3D=3D 1)) { > + if (data->enable[k] =3D=3D 1 && data->display_pstate_chan= ge_enable[k] =3D=3D 1) { > number_of_displays_enabled_with_margin =3D number= _of_displays_enabled_with_margin + 1; > } > } > @@ -1442,7 +1442,7 @@ static void calculate_bandwidth( > data->nbp_state_change_enable =3D bw_def_no; > } > /*dram clock change is possible only in vblank if all displays ar= e aligned and have no margin*/ > - if ((number_of_aligned_displays_with_no_margin =3D=3D number_of_d= isplays_enabled)) { > + if (number_of_aligned_displays_with_no_margin =3D=3D number_of_di= splays_enabled) { > nbp_state_change_enable_blank =3D bw_def_yes; > } > else { > @@ -1470,7 +1470,7 @@ static void calculate_bandwidth( > } > } > /*compute minimum time to read one chunk from the dmif buffer*/ > - if ((number_of_displays_enabled > 2)) { > + if (number_of_displays_enabled > 2) { > data->chunk_request_delay =3D 0; > } > else { > @@ -1804,7 +1804,7 @@ static void calculate_bandwidth( > data->stutter_exit_watermark[i] =3D bw_ad= d(bw_sub(vbios->stutter_self_refresh_exit_latency, data->total_dmifmc_urgen= t_latency), data->urgent_watermark[i]); > data->stutter_entry_watermark[i] =3D bw_a= dd(bw_sub(bw_add(vbios->stutter_self_refresh_exit_latency, vbios->stutter_s= elf_refresh_entry_latency), data->total_dmifmc_urgent_latency), data->urgen= t_watermark[i]); > /*unconditionally remove black out time f= rom the nb p_state watermark*/ > - if ((data->display_pstate_change_enable[i= ] =3D=3D 1)) { > + if (data->display_pstate_change_enable[i]= =3D=3D 1) { > data->nbp_state_change_watermark[= i] =3D bw_add(bw_add(vbios->nbp_state_change_latency, data->dmif_burst_time= [data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixels_tr= ansfer_time, data->dram_speed_change_line_source_transfer_time[i][data->y_c= lk_level][data->sclk_level])); > } > else { > @@ -1816,7 +1816,7 @@ static void calculate_bandwidth( > data->urgent_watermark[i] =3D bw_add(bw_a= dd(bw_add(bw_add(bw_add(vbios->mcifwrmc_urgent_latency, data->mcifwr_burst_= time[data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixel= s_transfer_time, data->line_source_transfer_time[i][data->y_clk_level][data= ->sclk_level])), vbios->blackout_duration), data->chunk_request_time), data= ->cursor_request_time); > data->stutter_exit_watermark[i] =3D bw_in= t_to_fixed(0); > data->stutter_entry_watermark[i] =3D bw_i= nt_to_fixed(0); > - if ((data->display_pstate_change_enable[i= ] =3D=3D 1)) { > + if (data->display_pstate_change_enable[i]= =3D=3D 1) { > data->nbp_state_change_watermark[= i] =3D bw_add(bw_add(vbios->nbp_state_change_latency, data->mcifwr_burst_ti= me[data->y_clk_level][data->sclk_level]), bw_max2(data->line_source_pixels_= transfer_time, data->dram_speed_change_line_source_transfer_time[i][data->y= _clk_level][data->sclk_level])); > } > else { > -- > 2.16.0.rc1.238.g530d649a79-goog >