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[209.132.180.67]) by mx.google.com with ESMTP id 5si15239pgj.750.2018.02.08.06.32.37; Thu, 08 Feb 2018 06:32:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752406AbeBHObc (ORCPT + 99 others); Thu, 8 Feb 2018 09:31:32 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:38208 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751700AbeBHObD (ORCPT ); Thu, 8 Feb 2018 09:31:03 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w18ETZ3k011530; Thu, 8 Feb 2018 15:30:46 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2fw4uj2vf7-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 08 Feb 2018 15:30:46 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A03C13A; Thu, 8 Feb 2018 14:30:44 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 76E61A4D2; Thu, 8 Feb 2018 14:30:44 +0000 (GMT) Received: from SAFEX1HUBCAS24.st.com (10.75.90.94) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 8 Feb 2018 15:30:44 +0100 Received: from localhost (10.201.23.32) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 8 Feb 2018 15:30:44 +0100 From: Philippe Cornu To: Thierry Reding , David Airlie , Rob Herring , Mark Rutland , , , CC: Andrzej Hajda , Yannick Fertre , Philippe Cornu , "Benjamin Gaignard" , Vincent Abriou , Alexandre Torgue Subject: [PATCH v1 1/2] dt-bindings/display/panel: Add support for Raydium rm68200 dsi panel Date: Thu, 8 Feb 2018 15:30:25 +0100 Message-ID: <20180208143026.23009-2-philippe.cornu@st.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180208143026.23009-1-philippe.cornu@st.com> References: <20180208143026.23009-1-philippe.cornu@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.32] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-02-08_08:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Raydium Semiconductor Corporation RM68200 is a 5.5" 720x1280 TFT LCD panel connected using a MIPI-DSI video interface. Signed-off-by: Philippe Cornu --- .../bindings/display/panel/raydium,rm68200.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/raydium,rm68200.txt diff --git a/Documentation/devicetree/bindings/display/panel/raydium,rm68200.txt b/Documentation/devicetree/bindings/display/panel/raydium,rm68200.txt new file mode 100644 index 000000000000..cbb79ef3bfc9 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/raydium,rm68200.txt @@ -0,0 +1,25 @@ +Raydium Semiconductor Corporation RM68200 5.5" 720p MIPI-DSI TFT LCD panel + +The Raydium Semiconductor Corporation RM68200 is a 5.5" 720x1280 TFT LCD +panel connected using a MIPI-DSI video interface. + +Required properties: + - compatible: "raydium,rm68200" + - reg: the virtual channel number of a DSI peripheral + +Optional properties: + - reset-gpios: a GPIO spec for the reset pin (active low). + - power-supply: phandle of the regulator that provides the supply voltage. + - backlight: phandle of the backlight device attached to the panel. + +Example: +&dsi { + ... + panel@0 { + compatible = "raydium,rm68200"; + reg = <0>; + reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>; + power-supply = <&v1v8>; + backlight = <&pwm_backlight>; + }; +}; -- 2.15.1