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[209.132.180.67]) by mx.google.com with ESMTP id c2-v6si97599pli.77.2018.02.08.07.07.18; Thu, 08 Feb 2018 07:07:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MCHZC8yO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752117AbeBHPGU (ORCPT + 99 others); Thu, 8 Feb 2018 10:06:20 -0500 Received: from mail-io0-f194.google.com ([209.85.223.194]:32914 "EHLO mail-io0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750882AbeBHPGT (ORCPT ); Thu, 8 Feb 2018 10:06:19 -0500 Received: by mail-io0-f194.google.com with SMTP id n7so6112645iob.0 for ; Thu, 08 Feb 2018 07:06:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=naz7Lu/zzylsk9KrKPj+pnYVuT8b5k5DCgGuX/iv+ic=; b=MCHZC8yOk15Nq3vYXf+GPpOwpJOyXp3WSVNdgEgESyA13L/Fh5Qm2l55lKj/wl6uew wunhiBYDaeQnWP+9qe1HKASyegDdRBm9UuwqkchBJbIlP0uMdAgXCkMcEstQGaovaqf0 XvRhCSMH2ljS97ttuwVyBBWckyYc7Pf4Mqo5g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=naz7Lu/zzylsk9KrKPj+pnYVuT8b5k5DCgGuX/iv+ic=; b=lBgIgcN3syM2RIzAkxRf1MiCqtYFf3QwasLH+IRdJ2KnYpN+sOP9TyusTusnVzkYdG +QOnEyMeeAtFowtzZYPV/q/GFI0FSkDEjK60eDKQW0rnlVg2FLx6E8Y0N08pOUsG9juP P5mao/sCUIVhWIB4f8HFP1Hepv+ug1SL9RNKPBxurmJGpsdYjV54c0LLkwtB+AA2HQ9a hBteB88yLqEwSXP2gjI1tB1NQpUu2DYw6Mc6P4WpoP8oMysTO0gr9QnEUEfx6W+BVWI+ GAISIvB7YqiUAX+QCDW/+7bWXrrSbKMXRn8waXLO1kzHVXcbbn3oQCI0ZB2xuHDhEaxh 4nVQ== X-Gm-Message-State: APf1xPAMVtIRXb8j7hW05qGRWO1cy4yuG7tqXrFzHSbhrubwrToYZrmg 6Oz7iizKXMWBML7zXLxitx+npFPG+Tdx8pLfhj8ghQ== X-Received: by 10.107.169.94 with SMTP id s91mr1187597ioe.83.1518102378627; Thu, 08 Feb 2018 07:06:18 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.50.198 with HTTP; Thu, 8 Feb 2018 07:05:58 -0800 (PST) In-Reply-To: <20180208140005.GH25201@hirez.programming.kicks-ass.net> References: <1517944987-343-1-git-send-email-vincent.guittot@linaro.org> <1517944987-343-2-git-send-email-vincent.guittot@linaro.org> <20180208140005.GH25201@hirez.programming.kicks-ass.net> From: Vincent Guittot Date: Thu, 8 Feb 2018 16:05:58 +0100 Message-ID: Subject: Re: [PATCH v2 1/3] sched: Stop nohz stats when decayed To: Peter Zijlstra Cc: Ingo Molnar , linux-kernel , Valentin Schneider , Morten Rasmussen , Brendan Jackman , Dietmar Eggemann , Will Deacon Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 8 February 2018 at 15:00, Peter Zijlstra wrote: > On Tue, Feb 06, 2018 at 08:23:05PM +0100, Vincent Guittot wrote: > >> @@ -9207,13 +9231,15 @@ void nohz_balance_enter_idle(int cpu) >> if (!housekeeping_cpu(cpu, HK_FLAG_SCHED)) >> return; >> >> + rq->has_blocked_load = 1; >> + >> if (rq->nohz_tick_stopped) >> - return; > > this case is difficult... needs thinking The use case happens when a CPU wakes up and goes back to idle before the tick fires and clears nohz_tick_stopped. > >> + goto out; >> >> /* >> * If we're a completely isolated CPU, we don't play. >> */ >> - if (on_null_domain(cpu_rq(cpu))) >> + if (on_null_domain(rq)) >> return; >> >> rq->nohz_tick_stopped = 1; >> @@ -9222,6 +9248,13 @@ void nohz_balance_enter_idle(int cpu) >> atomic_inc(&nohz.nr_cpus); >> >> set_cpu_sd_state_idle(cpu); > > /* > * Ensures that if nohz_idle_balance() fails to observe our > * @idle_cpus_mask store, it must observe the @has_blocked > * store. > */ > smp_mb__after_atomic(); > >> + >> +out: >> + /* >> + * Each time a cpu enter idle, we assume that it has blocked load and >> + * enable the periodic update of the load of idle cpus >> + */ >> + WRITE_ONCE(nohz.has_blocked, 1); >> } > > > >> @@ -9374,6 +9407,16 @@ static bool nohz_idle_balance(struct rq *this_rq, enum cpu_idle_type idle) >> >> SCHED_WARN_ON((flags & NOHZ_KICK_MASK) == NOHZ_BALANCE_KICK); >> >> + /* >> + * We assume there will be no idle load after this update and clear >> + * the has_blocked flag. If a cpu enters idle in the mean time, it will >> + * set the has_blocked flag and trig another update of idle load. >> + * Because a cpu that becomes idle, is added to idle_cpus_mask before >> + * setting the flag, we are sure to not clear the state and not >> + * check the load of an idle cpu. >> + */ >> + WRITE_ONCE(nohz.has_blocked, 0); > > /* > * Ensures that if we miss the CPU, we must see the has_blocked > * store from nohz_balance_enter_idle(). > */ > smp_mb(); > >> for_each_cpu(balance_cpu, nohz.idle_cpus_mask) { >> if (balance_cpu == this_cpu || !idle_cpu(balance_cpu)) >> continue; > > > I _think_, but my brain isn't quite willing to turn on today. > > Without this ordering I think it would be possible to loose has_blocked > and not observe the CPU either. I think that you are right. I also wondered if some barriers were necessary but wrongly concluded that set operation on nohz.idle_cpus_mask and WRITE_ONCE with volatile would be enough to ensure the right ordering > >