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Date:   Thu, 8 Feb 2018 23:32:36 +0100
From:   Sebastian Reichel <sre@kernel.org>
To:     Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc:     James Hogan <jhogan@kernel.org>,
        Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org,
        linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
        devicetree@vger.kernel.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH v3 2/8] dt-bindings: power: reset: Document ocelot-reset
 binding
Message-ID: <20180208223236.47g2gzi4mb6blxgi@earth.universe>
References: <20180116101240.5393-1-alexandre.belloni@free-electrons.com>
 <20180116101240.5393-3-alexandre.belloni@free-electrons.com>
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Hi,

On Tue, Jan 16, 2018 at 11:12:34AM +0100, Alexandre Belloni wrote:
> Add binding documentation for the Microsemi Ocelot reset block.
>=20
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: Sebastian Reichel <sre@kernel.org>
> Cc: linux-pm@vger.kernel.org
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---

Thanks, queued. My public for-next branch is waiting for 4.16-rc1
tag, though.

-- Sebastian

>  .../devicetree/bindings/power/reset/ocelot-reset.txt       | 14 ++++++++=
++++++
>  1 file changed, 14 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/power/reset/ocelot-=
reset.txt
>=20
> diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.t=
xt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
> new file mode 100644
> index 000000000000..1b4213eb3473
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt
> @@ -0,0 +1,14 @@
> +Microsemi Ocelot reset controller
> +
> +The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to re=
set the
> +SoC MIPS core.
> +
> +Required Properties:
> + - compatible: "mscc,ocelot-chip-reset"
> +
> +Example:
> +	reset@1070008 {
> +		compatible =3D "mscc,ocelot-chip-reset";
> +		reg =3D <0x1070008 0x4>;
> +	};
> +
> --=20
> 2.15.1
>=20

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