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[209.132.180.67]) by mx.google.com with ESMTP id v12-v6si952522plk.577.2018.02.08.19.53.12; Thu, 08 Feb 2018 19:53:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752611AbeBIDwB (ORCPT + 99 others); Thu, 8 Feb 2018 22:52:01 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:9403 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752201AbeBIDv7 (ORCPT ); Thu, 8 Feb 2018 22:51:59 -0500 X-UUID: cc7858a86feb4ba182ba676ca6eda9b6-20180209 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 61619081; Fri, 09 Feb 2018 11:51:53 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 9 Feb 2018 11:51:52 +0800 Received: from [172.21.77.33] (172.21.77.33) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 9 Feb 2018 11:51:52 +0800 Message-ID: <1518148312.9025.17.camel@mtkswgap22> Subject: Re: [PATCH v2 14/16] arm64: dts: mt7622: add thermal and related nodes From: Sean Wang To: Matthias Brugger CC: , , , , , Date: Fri, 9 Feb 2018 11:51:52 +0800 In-Reply-To: <4db5c81b-0e55-3676-d7c8-d1b6aefb99c4@gmail.com> References: <687a7c43e3e3260ebdf004a96d2cde143f563250.1517910489.git.sean.wang@mediatek.com> <4db5c81b-0e55-3676-d7c8-d1b6aefb99c4@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2018-02-07 at 12:43 +0100, Matthias Brugger wrote: > > On 02/06/2018 10:53 AM, sean.wang@mediatek.com wrote: > > From: Sean Wang > > > > add nodes for the thermal controller and associated thermal zone using > > CPU as the cooling device for each trip point. In addition, add a fixup > > for thermal_calibration on nvmem should be 12 bytes as the minimal > > requirement. > > > > Signed-off-by: Sean Wang > > --- > > arch/arm64/boot/dts/mediatek/mt7622.dtsi | 72 +++++++++++++++++++++++++++++++- > > 1 file changed, 71 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi > > index e6dd4f6..6cf67dd 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi > > @@ -12,6 +12,7 @@ > > #include > > #include > > #include > > +#include > > > > / { > > compatible = "mediatek,mt7622"; > > @@ -75,6 +76,7 @@ > > <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>; > > clock-names = "cpu", "intermediate"; > > operating-points-v2 = <&cpu_opp_table>; > > + #cooling-cells = <2>; > > enable-method = "psci"; > > clock-frequency = <1300000000>; > > }; > > @@ -119,6 +121,58 @@ > > }; > > }; > > > > + thermal-zones { > > + cpu_thermal: cpu-thermal { > > + polling-delay-passive = <1000>; > > + polling-delay = <1000>; > > + > > + thermal-sensors = <&thermal 0>; > > + > > + trips { > > + cpu_passive: cpu-passive { > > + temperature = <47000>; > > + hysteresis = <2000>; > > + type = "passive"; > > + }; > > + > > + cpu_active: cpu-active { > > + temperature = <67000>; > > + hysteresis = <2000>; > > + type = "active"; > > + }; > > + > > + cpu_hot: cpu-hot { > > + temperature = <87000>; > > + hysteresis = <2000>; > > + type = "hot"; > > + }; > > + > > + cpu-crit { > > + temperature = <107000>; > > + hysteresis = <2000>; > > + type = "critical"; > > + }; > > + }; > > + > > + cooling-maps { > > + map0 { > > + trip = <&cpu_passive>; > > + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > > + }; > > + > > + map1 { > > + trip = <&cpu_active>; > > + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > > + }; > > + > > + map2 { > > + trip = <&cpu_hot>; > > + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > > + }; > > + }; > > + }; > > + }; > > + > > timer { > > compatible = "arm,armv8-timer"; > > interrupt-parent = <&gic>; > > @@ -201,7 +255,7 @@ > > #size-cells = <1>; > > > > thermal_calibration: calib@198 { > > - reg = <0x198 0x8>; > > + reg = <0x198 0xc>; > > Any reason why this is not part of patch 8/16? > There's no strong reason wanting me to do that. patch 8 has contained a lot of nodes and patch 16 is present just in v2. So, I felt it should be a little bit easy that people reviews those patches if they are put into separate patches. But, It's still fine to make them into one in the next version. > Regards, > Matthias >