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[209.132.180.67]) by mx.google.com with ESMTP id k9-v6si1485311pll.578.2018.02.09.04.06.27; Fri, 09 Feb 2018 04:06:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=siBZ/60g; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751700AbeBIMET (ORCPT + 99 others); Fri, 9 Feb 2018 07:04:19 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:9007 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751034AbeBIMEC (ORCPT ); Fri, 9 Feb 2018 07:04:02 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w19C3oqm000650; Fri, 9 Feb 2018 06:03:50 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1518177830; bh=v9Ez7gfHsf3WFxB3sbQUSiR/5/SNx7mmRaAoK3iu0SU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=siBZ/60gvTbSHQtdVDwdIQuS+hwV7pWbTF0arfu5Se8xC/3YeU7kecx9NErJ7z6LG pqOSBs+n+L3OBnMoOjogNe1QcGsMYmjCNrJsDzaGETebyGOIa7DaIFcLcp+TiW5m/c 5yUN73B67LTyE9kJd3L1CALcbQiKc9YaelH+WJew= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w19C3oF2023031; Fri, 9 Feb 2018 06:03:50 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 9 Feb 2018 06:03:50 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 9 Feb 2018 06:03:50 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w19C3bkr017802; Fri, 9 Feb 2018 06:03:47 -0600 From: Vignesh R To: Lorenzo Pieralisi , Jingoo Han , Joao Pinto CC: Kishon Vijay Abraham I , Bjorn Helgaas , Niklas Cassel , , , , Vignesh R Subject: [PATCH 3/3] PCI: dwc: pci-dra7xx: Handle legacy and MSI IRQs together Date: Fri, 9 Feb 2018 17:34:15 +0530 Message-ID: <20180209120415.17590-4-vigneshr@ti.com> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180209120415.17590-1-vigneshr@ti.com> References: <20180209120415.17590-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently, pci-dra7xx driver handles MSI and Legacy IRQs exclusive of each other. This is not true, as there maybe both legacy and MSI IRQs raised at the same time. Fix this by making sure that driver handles both MSI and legacy IRQs in the IRQ handler. Signed-off-by: Vignesh R --- drivers/pci/dwc/pci-dra7xx.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index 3420cbf7b60a..1ddb62620acc 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -261,8 +261,7 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI); dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI, reg); - switch (reg) { - case MSI: + if (reg & MSI) { /* * Need to make sure no MSI IRQs are pending before * exiting handler, else the wrapper will not catch new @@ -279,17 +278,13 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) reg); return IRQ_HANDLED; } - break; - case INTA: - case INTB: - case INTC: - case INTD: + } + if (reg & LEG_EP_INTERRUPTS) { for_each_set_bit(bit, ®, PCI_NUM_INTX) { virq = irq_find_mapping(dra7xx->irq_domain, bit); if (virq) generic_handle_irq(virq); } - break; } return IRQ_HANDLED; -- 2.16.1