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[209.132.180.67]) by mx.google.com with ESMTP id z8si1353665pgs.605.2018.02.09.04.44.16; Fri, 09 Feb 2018 04:44:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kclvLPSk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751304AbeBIMnW (ORCPT + 99 others); Fri, 9 Feb 2018 07:43:22 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:10088 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751231AbeBIMnV (ORCPT ); Fri, 9 Feb 2018 07:43:21 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w19Cg4Er005801; Fri, 9 Feb 2018 06:42:04 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1518180124; bh=AsXx+1oucmXt8OWVUoLvKf8eOpUlFSrhJkYZ8nG87aY=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=kclvLPSkbWHrTUiuc6txRkwLAYjVFDK3ZeBHCTllLAFtoLfjKPHg9sIJvmf8puDx0 bfzMg0Qh5OrmvG/iIsgiyp2NQUmnbIgfoCgvQJDlT3gDG8R7PZtI/yGilstZrn6lzd ptt040Lh8QfvaMzrdhzVmv1eR/TfntNNKoROoYFo= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w19Cg3RY011612; Fri, 9 Feb 2018 06:42:04 -0600 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 9 Feb 2018 06:42:03 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 9 Feb 2018 06:42:03 -0600 Received: from [172.24.190.171] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w19Cg08A010256; Fri, 9 Feb 2018 06:42:01 -0600 Subject: Re: [PATCH 0/7] ARM: davinci: add genpd support To: David Lechner , Bartosz Golaszewski , Rob Herring , Mark Rutland , Kevin Hilman , Russell King CC: , , , Bartosz Golaszewski References: <20180207134553.13510-1-brgl@bgdev.pl> <4dbc57ec-3506-eb1d-e00d-adfe75c3b39b@lechnology.com> From: Sekhar Nori Message-ID: Date: Fri, 9 Feb 2018 18:12:00 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: <4dbc57ec-3506-eb1d-e00d-adfe75c3b39b@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi David, On Thursday 08 February 2018 04:13 AM, David Lechner wrote: > On 02/07/2018 07:45 AM, Bartosz Golaszewski wrote: >> From: Bartosz Golaszewski >> >> Hi Sekhar et al, >> >> please take a look at the following patches. They add a simple genpd >> driver and use it in DT mode on da850 boards. >> >> I was trying to use genpd in legacy mode too, but couldn't find neither >> any interfaces nor users that would do that. For now I added a check in >> arch/arm/mach-davinci/pm_domain.c that disables the clock pm setup if >> we're using genpd. >> >> This series applies on top of and has been tested with David Lechner's >> for-bartosz branch. It fixes the clock look-up issues we faced with >> lcdc and emac. > > I'm starting to think that it makes more sense to just make the PSC driver > a power-domain and reset provider rather than a clock provider. It is > unfortunate that genpd is DT only. This will mean that the only way to enable clocks on DaVinci is to use pm_runtime() calls. We do still have drivers which depend on clk api for enabling clocks, so I am not sure its feasible just yet. I think a question like this can arise for any gate clock. Thanks, Sekhar