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[209.132.180.67]) by mx.google.com with ESMTP id c11-v6si64252plo.675.2018.02.12.06.46.46; Mon, 12 Feb 2018 06:47:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=jY/jZobK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935612AbeBLNjr (ORCPT + 99 others); Mon, 12 Feb 2018 08:39:47 -0500 Received: from mail-io0-f174.google.com ([209.85.223.174]:46212 "EHLO mail-io0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932747AbeBLNjp (ORCPT ); Mon, 12 Feb 2018 08:39:45 -0500 Received: by mail-io0-f174.google.com with SMTP id k80so5902917ioe.13; Mon, 12 Feb 2018 05:39:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=7nWAZlvit2hiVs1QAfibzNRkjwHFmRIll52vPPjNLP0=; b=jY/jZobKxkadRIJQ4apEUmD8vJhe6hdaBDfle5UWJ+CI3uZh5XbvzWMEjxlOv2IfXP X6/btjc7L71t0t+oYUtqu+BhwzS2PPmF9aVt+Ktc+EQDQxxVT43L+kcDjk+0Du7z/b0R faanbs5+grI/shUHZJb5s0ZkQ3zIu9togM+FWB+1JBs6RRqd8Sa8kS0+BaeXh/2uABE6 ZjwdJrQysbWgKk4T9LbzsaC45CBXE0SdW4TWanUp524o1QQt95mzsopvx2HT+7UWSklj EpocRLFTBp1Jn3oeKBm0Vo208LhSeMkiKdPOJplKQaLtQCCt8g1cHBfKz1g/aelzXxWE xiHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=7nWAZlvit2hiVs1QAfibzNRkjwHFmRIll52vPPjNLP0=; b=PYw45kQi9qh5DA73dq3CqoMIFfTgJQlWJukWf8lNTO0u3B32aHBv+gHN+AmLp9UDMM h7iEfhshqmVJPpIYGnjwYtu/57sekyMQw2ZxxcBXq41G4oHYZ6L5HfywjcuYXB/JrHJc zivYLOdnfquwmYbtWMEyXwUnxtu9FYMNCDgsaCbLYoK1E9/vGQ4kGuPAJN0wCswTRrq8 6kaBPPaX18xtQ2JtSCw4k3BM5MuP911g1moNcmjt7en1b/S+XJeUYkldxtl22aleRXRF ZP4BWuFcVySWgermaIOSFCraabNwSKs2MZnBAFNO3itIV3Je6LtcTeBMzCzhpRZXm/tk kA6Q== X-Gm-Message-State: APf1xPB0LRKDbzBcl57I2reEin+wSkCHgcY7NE/NBBks1BF822TNo8mq YX6CWrQedx2MmozKpDP12gDTQ/AxbhIu1V9YwC0= X-Received: by 10.107.140.139 with SMTP id o133mr8886544iod.219.1518442784356; Mon, 12 Feb 2018 05:39:44 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.8.9 with HTTP; Mon, 12 Feb 2018 05:39:43 -0800 (PST) In-Reply-To: References: <1516058925-46522-1-git-send-email-jim2101024@gmail.com> <1516058925-46522-5-git-send-email-jim2101024@gmail.com> <20180118073123.GA15766@lst.de> <20180118152331.GA24461@lst.de> <20180123132033.GA21438@lst.de> <20180126075343.GB2356@lst.de> From: Jim Quinlan Date: Mon, 12 Feb 2018 08:39:43 -0500 Message-ID: Subject: Re: [PATCH v4 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic To: Christoph Hellwig Cc: Florian Fainelli , Rob Herring , "linux-kernel@vger.kernel.org" , Bjorn Helgaas , Catalin Marinas , Will Deacon , Brian Norris , Russell King , Robin Murphy , Jonas Gorski , Lorenzo Pieralisi , Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux-MIPS , linux-pci , Kevin Cernekee , Ralf Baechle , bcm-kernel-feedback-list , Gregory Fong , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 26, 2018 at 12:46 PM, Jim Quinlan wrote: > On Fri, Jan 26, 2018 at 2:53 AM, Christoph Hellwig wrote: >> On Wed, Jan 24, 2018 at 12:04:58PM -0800, Florian Fainelli wrote: >>> This looks nicer than the current shape, but this still requires to >>> register a PCI fixup to override phys_to_dma() and dma_to_phys(), and it >>> would appear that you have dodged my question about how this is supposed >>> to fit with an entirely modular PCIe root complex driver? Are you >>> suggesting that we split the module into a built-in part and a modular part? >> >> I don't think entirely modular PCI root bridges should be a focal point >> for the design. If we happen to support them by other design choices: >> fine, but they should not be a priority. > > I disagree. If there is one common thing our customers request it is > the ability to remove (or control the insmod of after boot) the pcie > RC driver. I didn't add this in as a "nice-to-have". > >> >> That being said if we have core dma mapping or PCIe code that has >> a list of offsets and the root complex only populates them it should >> work just fine. > > I'm looking at arch/arm/include/asm/dma-mapping.h. In addition to > overriding dma_to_phsy() and phys_to_dma(), it looks like I may have > to define __arch_pfn_to_dma(), __arch_dma_to_pfn(), > __arch_dma_to_virt(), __arch_virt_to_dma(). Do you agree or is this > not necessary? If it is, this seems more intrusive than our > pcie-brcmstb-dma.c solution which doesn't require tentacles into > major include files and Kconfigs. > > Another issue is that our function wrappers -- depending upon whether > we are dealing with a pci device or not -- will have to possibly call > the actual ARM and ARM64 definitions of these functions, which have > been of course #ifdef'd out. This means that our code must contain > identical copies of these functions' code and that the code must > somehow be kept in sync. Do you see a solution to this? > > Jim Cristoph, Could you please respond to my comments? Even a negative response is better than none. The problem with doing what you suggested is with ARM -- ARM64 and MIPS relatively uncomplicated . With ARM, I have to define the aforementioned functions -- the only way of doing this is to define arch/arm/mach-bcm/include/mach/memory.h, and for that to be picked up we no longer can have CONFIG_ARCH_MULTIPLATFORM=y, which is an unacceptable cost to pay for just an unusual PCIe RC controller. Regarding my current submission -- you are right, SWIOTLB will not work for EPs that require it. However, we don't care about these devices, and can just bailout with EPs when the dma_mask is <= 0xffff_ffff or if swiotlb_force == SWIOTLB_FORCE. Note that this would only affect PCIe DMA. We also have no plan of using MIPS64. -- Jim