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From:   Dan Williams <dan.j.williams@intel.com>
Date:   Mon, 12 Feb 2018 14:49:59 -0800
Message-ID: <CAPcyv4j6DWQEKt7gC9ZpisBMuyraCRw_JevOT9VOu0nLJV5XQQ@mail.gmail.com>
Subject: Re: [PATCH v2] libnvdimm: re-enable deep flush for pmem devices
To:     Dave Jiang <dave.jiang@intel.com>
Cc:     "Zwisler, Ross" <ross.zwisler@intel.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        linux-nvdimm@lists.01.org
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On Mon, Feb 12, 2018 at 1:46 PM, Dave Jiang <dave.jiang@intel.com> wrote:
> Re-enable deep flush so that users always have a way to be sure that a write
> does make it all the way out to the NVDIMM. The PMEM driver writes always
> make it "all the way to the NVDIMM", and it relies on the ADR mechanism to
> flush the write buffers on power failure. Deep flush is there to explicitly
> flush those write buffers to protect against (rare) ADR failure.
> This change prevents a regression in deep flush behavior so that applications
> can continue to depend on fsync() as a mechanism to trigger deep flush in the
> filesystem-dax case.
>
> Fixes: 06e8ccdab15f4 ("acpi: nfit: Add support for detect platform CPU cache flush on power loss")
>
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>

Thanks Dave, applied.