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[209.132.180.67]) by mx.google.com with ESMTP id i67si405862pfj.212.2018.02.12.14.55.25; Mon, 12 Feb 2018 14:55:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933152AbeBLWxo (ORCPT + 99 others); Mon, 12 Feb 2018 17:53:44 -0500 Received: from mx1.redhat.com ([209.132.183.28]:52096 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933084AbeBLWxm (ORCPT ); Mon, 12 Feb 2018 17:53:42 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5E57B83F42; Mon, 12 Feb 2018 22:53:42 +0000 (UTC) Received: from segfault.boston.devel.redhat.com (segfault.boston.devel.redhat.com [10.19.60.26]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BF1AA60A97; Mon, 12 Feb 2018 22:53:41 +0000 (UTC) From: Jeff Moyer To: Dave Jiang Cc: dan.j.williams@intel.com, ross.zwisler@intel.com, linux-kernel@vger.kernel.org, linux-nvdimm@lists.01.org Subject: Re: [PATCH v2] libnvdimm: re-enable deep flush for pmem devices References: <151847194459.58291.11339638808076622981.stgit@djiang5-desk3.ch.intel.com> X-PGP-KeyID: 1F78E1B4 X-PGP-CertKey: F6FE 280D 8293 F72C 65FD 5A58 1FF8 A7CA 1F78 E1B4 X-PCLoadLetter: What the f**k does that mean? Date: Mon, 12 Feb 2018 17:53:40 -0500 In-Reply-To: <151847194459.58291.11339638808076622981.stgit@djiang5-desk3.ch.intel.com> (Dave Jiang's message of "Mon, 12 Feb 2018 14:46:13 -0700") Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 12 Feb 2018 22:53:42 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dave Jiang writes: > Re-enable deep flush so that users always have a way to be sure that a write > does make it all the way out to the NVDIMM. The PMEM driver writes always > make it "all the way to the NVDIMM", and it relies on the ADR mechanism to > flush the write buffers on power failure. Deep flush is there to explicitly > flush those write buffers to protect against (rare) ADR failure. > This change prevents a regression in deep flush behavior so that applications > can continue to depend on fsync() as a mechanism to trigger deep flush in the > filesystem-dax case. That's still very confusing text. Specifically, the part where you say that pmem driver writes always make it to the DIMM. I think the changelog could start with "Deep flush is there to explicitly flush write buffers...." Anyway, the fix looks right to me. Reviewed-by: Jeff Moyer