Received: by 10.223.185.116 with SMTP id b49csp173014wrg; Tue, 13 Feb 2018 19:09:27 -0800 (PST) X-Google-Smtp-Source: AH8x224988yCjDKmSTnp39+L/o+OTm7Ov5mogYYtvZA6pLi8520SR5ZebxrlC7HAQ+GMFwAOz20D X-Received: by 10.98.57.146 with SMTP id u18mr3267023pfj.237.1518577767570; Tue, 13 Feb 2018 19:09:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518577767; cv=none; d=google.com; s=arc-20160816; b=gDxUc4vaJubYQFVReHjzg0hbl10fqPPGjX8rFRLetqsj4WksHMMsg1Ty2DzOtcGHOZ p/tKNzYHO8wcdhsDYHvzQLRindhCmkJ5UQT8ZWpW1mwmzGM4umJSbHreHpBHHGah0X6p e9UqQketP88Zo+fydj3F/bPAeBTsXlz0Yr5ryVtqdL7Z9R01ZrsbW+BK/GDpwElm/XNv mBk5yEsFjenySKtcSGs135V/Hmc+zPiZIGHVJlnD9pDQcZmhQq5h8+Zw33Ji4X+ic3Kf 4a3pSfbhAFaiLodRy7Uo3Jf3MhwcpeMg5dtdW/QuhGKd1RiUH98gyRobshmvoRuj2CD8 LBVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature :arc-authentication-results; bh=O7IBkxeew+YYmmjcbBq6Ru2K6JaY84EYS8w7Woj/zZw=; b=yr9YYzlymZ0tTfWz/wRp26cjZ23kYaqG90vbOC6A3MuWOGjMovYeELtALkmvUEtHz4 o9KhefejXIdxXu51103hcQ1bRVpqx3i7hbWE75r/nhUDXA9aIp6spYKukQ6w7kE8BEjc ol9VIDY669hU7jDrWGrQLHtWcnylXG/MJWYQvq0gNcZNexNblA5X9xbIrKkqq5MjGGyX wQ0SazZiHQ+++977/X1mxjQXDfqAdshX+wpuNruleKHdXRe1KBwGrEoZ8HiPUHbipwy8 3LGZ/BG6oDapPdHcX5llLpeOrUbAxgOafH3X8VuF9bllLzK+o+LcElUFMmm83V/YmvbG QevA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PNENSRvq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z2si2085768pgn.768.2018.02.13.19.09.12; Tue, 13 Feb 2018 19:09:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PNENSRvq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966687AbeBNDIF (ORCPT + 99 others); Tue, 13 Feb 2018 22:08:05 -0500 Received: from mail-oi0-f41.google.com ([209.85.218.41]:34182 "EHLO mail-oi0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966670AbeBNDID (ORCPT ); Tue, 13 Feb 2018 22:08:03 -0500 Received: by mail-oi0-f41.google.com with SMTP id k15so15513042oib.1 for ; Tue, 13 Feb 2018 19:08:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=O7IBkxeew+YYmmjcbBq6Ru2K6JaY84EYS8w7Woj/zZw=; b=PNENSRvqPu53vLdqS5XQs9PlBGXXsUeGYGnVXUpll+exqf/lb1KM9cL+SA5Yg4TsDr t90+0ZHNkvtlz/O4u5cD67klQuL+F2/tkq/QF/SULDpueYr9yXAj89N+QRmd1yB85rVg ex30P5e3h4uAPT0BNS0zTwDTw05fYWub7/6Ck= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=O7IBkxeew+YYmmjcbBq6Ru2K6JaY84EYS8w7Woj/zZw=; b=K3rrPi6A1JjoBlMNXKce2O42D5Sauwri3pKGdpC+Rq0AHTSmXQdOzx1mV6JpM4l49s zXwvlorQpfVrQqFrnm+l6oBAWC8mG5jWeNOdXC9391q4sjFNDCGtZjiDk71vwlD6RilC FTspRTBfuqHbM9kVHWQDYDW74voyD24UXNQKXQPxJ/hB9YOCIUrQ+oTgmWatFcbVV/nk 8W4/hcy3tpPJ7YdqGtCeQGLuiR5XCdIuQuFb6HrE10NJ9CqVrfWpxENnTTay763I6Lhw AqzswxCEj3nmupwM8ewRxgYtts/z7Q9KgtvdLgcjGfYqEPGiI8C3dT6K15v8As4frbSM hpYQ== X-Gm-Message-State: APf1xPA9w+6UbF+tZj1cuNLPMJxwTLWOx8VeOZVHuALtHzq4MpH4AHpO c/jYlEyGhtTPfoaW8jJ6E8JnBZKiQBblwvSztclZjg== X-Received: by 10.202.85.77 with SMTP id j74mr2133531oib.1.1518577682537; Tue, 13 Feb 2018 19:08:02 -0800 (PST) MIME-Version: 1.0 Received: by 10.157.28.174 with HTTP; Tue, 13 Feb 2018 19:08:02 -0800 (PST) In-Reply-To: References: From: Baolin Wang Date: Wed, 14 Feb 2018 11:08:02 +0800 Message-ID: Subject: Re: [PATCH 1/2] dt-bindings: gpio: Add Spreadtrum EIC controller documentation To: Linus Walleij Cc: Rob Herring , Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "linux-kernel@vger.kernel.org" , "open list:GPIO SUBSYSTEM" , Mark Brown , Andy Shevchenko Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Linus, On 13 February 2018 at 16:28, Linus Walleij wrote: > Hi Baolin! > > Thank you for your patch. > > On Thu, Feb 8, 2018 at 9:01 AM, Baolin Wang wrote: > >> This patch adds the device tree bindings for the Spreadtrum EIC >> controller. The EIC can be recognized as one special type of GPIO, > > s/recognized as one/seen as a/g Sorry for the typos. > >> which can only be used as input. >> >> Signed-off-by: Baolin Wang > >> +The EIC is the abbreviation of external interrupt controller, which >> +is only can be used as input mode. The EIC controller includes 4 > > can be used only in input mode. OK. > >> +sub-modules: EIC-Debounce, EIC-Latch, EIC-Async, EIC-Sync. > > Are they four sub-modules that are always synthesized into the > silicon at the same time, or do you mean that when producing the > hardware, the designer will choose one of these four types (it looks > like that from the example). Usually they are all synthesized into the silicon, but not always. For our PMIC EIC, we only have one debounce EIC. > >> + >> +The EIC-debounce sub-module provides up to 8 source input signal >> +connection. > > connections. > >> A debounce machanism is used to > > mechanism > >> capture input signal's > > capture the input signals' Sure. > > (note plural signals genitive) > >> +stable status (ms grade) > > is that millisecond resolution you mean? Yes. > >> and a single-trigger mechanism is introduced >> +into this sub-module to enhance the input event detection reliability. >> +In addition, this sub-module's clock can be shut-off automatically to > > no dash in "shut off" OK. > >> +reduce power dissipation. The debounce range is from 1ms to 4s with >> +the step of 1ms. > > a step size of OK. > >> If the input signal is shorter than 1ms, it will be >> +omitted as this sub-module. > > I don't understand the last part, do you mean the signal will be ignored > if it is asserted for less than 1 ms? Yes, sorry for confusing, and I will modify this part. > >> +The EIC-latch sub-module is used to latch some special input signal > > signals (plural) > > What is special about them? Ah, I will describe them in next version after making sure with my colleagues. > >> +and send interrupts to MCU core, and it can provide up to 8 latch >> +source input signal connection. > > connections (plural) > >> +The EIC-async sub-module uses 32k clock > > a 32kHz clock > >> to capture short signal > > to capture the short signal OK. > >> +(us grade) > > Do you mean "microsecond granularity"? Yes. > >> to generate interrupt to MCU by level or edge trigger. > > What is MCU? I think you can just omit it, it could be integrated > elsewhere. Sure, I will remove it. > >> +The EIC-sync is similar with GPIO's input function. > > Do you mean that the EIC-sync module is a synchronized signal input > register? Please write that. Yes. OK. > >> +Required properties: >> +- compatible: Should be one of the following: >> + "sprd,sc9860-eic-debounce", >> + "sprd,sc9860-eic-latch", >> + "sprd,sc9860-eic-async", >> + "sprd,sc9860-eic-sync", >> + "sprd,sc27xx-eic-debounce". > > So it looks like there is one at the time, so in the SC9860 > all four modules exist, but at different addresses? Yes. > > (...) >> +Example: >> + eic_debounce: eic@40210000 { >> + compatible = "sprd,sc9860-eic-debounce"; >> + reg = <0 0x40210000 0 0x80>; > > So does this mean that this is a debounced-only EIC? Yes. > > There are latch, async and sync versions somewhere else in > memory? Or there could be? And they are never say debounce > and latch at the same time? Etc? I did not list latch, async, and sync EIC. They are different sub-modules and they can be listed at the same time. I will add other device nodes in next version. Thanks for your comments. > > Yours, > Linus Walleij -- Baolin.wang Best Regards