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[209.132.180.67]) by mx.google.com with ESMTP id b3-v6si188543pli.440.2018.02.14.06.35.53; Wed, 14 Feb 2018 06:36:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=a/OfhNgu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030798AbeBNOeF (ORCPT + 99 others); Wed, 14 Feb 2018 09:34:05 -0500 Received: from mail-it0-f67.google.com ([209.85.214.67]:54616 "EHLO mail-it0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030600AbeBNOeD (ORCPT ); Wed, 14 Feb 2018 09:34:03 -0500 Received: by mail-it0-f67.google.com with SMTP id p204so2931047itc.4 for ; Wed, 14 Feb 2018 06:34:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=/Rjr2O/uFa/Nps2CW89JnE23NOtrcYQs9rXDPmgpN10=; b=a/OfhNguhROnLWMn/dbPsHmc691Ph+29fCqtzlqjE9lGFi9M7hOcD41j7lmLKpryZ1 iPw+Gqqpvw1kQUzBKkzOhnYrUGrEEXTNC0pAxYOW0FNQNydzw0GEQpSqQPwyeunbS2pP t+9uqhnup3hoHRTcCijtKQnKlIVW+bMKzSJB4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=/Rjr2O/uFa/Nps2CW89JnE23NOtrcYQs9rXDPmgpN10=; b=Pv1BXmHn7iLPLnHxoyDmWI0NTdJxNEF3dJVbhhCRlhIAMY90B27qZY4r/Q/fw8LXVX C4ZAQNnZ23HPAcnQ2WU/ZGALAvQE330nsDb55Fc1BXclVICPWb85f7AgZvlpeujV4Viz zTkx7KEasIczFgtl5i8U5Dj5IXu4sr7RgPc8yEZ05xG5zmcunRU0avq1Y7Emtr8PHJjF in2GdwsZQb0C71NY2gKqNEDjS85grPOp+ddk6wdMwImrmd3tN16U2MZyJZiVlE2UwaIk aR++JkbX+HrHutOANPDZmygwgdtl/RAm8Br3To+vbcxkXVFHegp5W4A8dXZowHM5xRkl jxpQ== X-Gm-Message-State: APf1xPC7pxgUalTQe9hYSplnE3sNh19nZ/sJRU5XzdIh5rMnli4iGp2o fLQJxop1StQdT5osqZRy/G2oHncZOOyJqeMAKHvUTQ== X-Received: by 10.36.108.208 with SMTP id w199mr6469194itb.102.1518618842566; Wed, 14 Feb 2018 06:34:02 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.112.13 with HTTP; Wed, 14 Feb 2018 06:34:01 -0800 (PST) In-Reply-To: References: <20180212113801.2552-1-ard.biesheuvel@linaro.org> <20180214135420.GB24189@kroah.com> From: Ard Biesheuvel Date: Wed, 14 Feb 2018 14:34:01 +0000 Message-ID: Subject: Re: [GIT PULL] arm64 spectre and meltdown mitigations for v4.14-stable To: Greg KH Cc: stable@vger.kernel.org, Linux Kernel Mailing List , Will Deacon , Catalin Marinas , Marc Zyngier , Mark Brown , linux-arm-kernel Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14 February 2018 at 14:24, Ard Biesheuvel wrote: > On 14 February 2018 at 13:54, Greg KH wrote: >> On Mon, Feb 12, 2018 at 11:38:01AM +0000, Ard Biesheuvel wrote: >>> Hi Greg, >>> >>> As mentioned by Will, I have created the v4.14 counterpart of his stable >>> backport of the arm64/ARM Spectre/Meltdown mitigations that have been pulled >>> into v4.16-rc1. >>> >>> Given that this is the v4.15 version backported to v4.14, I have removed any >>> mention of 'conflicts' from the commit logs as they are now ambiguous. The >>> patches applied surprisingly cleanly, I only needed to drop two patches that >>> are already in (the same ones Will mentioned in his PR), and drop another one >>> dealing with SPE, support for which did not exist yet in v4.14. I also included >>> the patch >>> >>> arm64: move TASK_* definitions to >>> >>> from v4.15 to make Robin's Spectre v1 patches apply more cleanly. >> >> I've queued these up now, but if you could pull the whole quilt tree and >> verify I got things right, that would be great. There was some >> conflicts with a few previous patches I had already queued up that >> touched some "Falkor" errata code. >> >> Specifically 932b50c7c1c65e6f23002e075b97ee083c4a9e71 "arm64: Add >> software workaround for Falkor erratum 1041" is the offending patch. I >> think I resolved the merge issues properly, but verifying this would be >> wonderful. >> > > No, the build is broken now. I will investigate. Your patch 977c3d2cb684e143a18e1564fbf5ecf7576a1c98 arm64: Move post_ttbr_update_workaround to C code removes the pre_disable_mmu_workaround macro from asm/assembler.h but it should only remove post_ttbr_update_workaround Once I add that back, things seem to build and run as expected. Thanks, Ard.