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[209.132.180.67]) by mx.google.com with ESMTP id t14-v6si1079925plm.20.2018.02.14.06.58.50; Wed, 14 Feb 2018 06:59:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=tY2XoSxL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030947AbeBNO5C (ORCPT + 99 others); Wed, 14 Feb 2018 09:57:02 -0500 Received: from mail-oi0-f68.google.com ([209.85.218.68]:34269 "EHLO mail-oi0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030382AbeBNO45 (ORCPT ); Wed, 14 Feb 2018 09:56:57 -0500 Received: by mail-oi0-f68.google.com with SMTP id k15so16687401oib.1; Wed, 14 Feb 2018 06:56:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=P8HbTIohzMyFeNHPHkBrMJXCJfjW5V4ojYQ6Qu8VudE=; b=tY2XoSxLC4j04EGAe+oyj3ZUcWWezNjVjCimWiNXYwU8eVBM7cXbQ78aS0pGlSWhVX ir1y3E4UrXC0hTinMxeXMvtKJ+1sbXnYUC+fYoXDTRJXBSTUoHEtGcdXAaPyPCYZIYn5 j2x/yQjvVluaqJGIIVz/JWaBb9Eq9K4lic3PTA9xMjctN782u2/xFE2EvSduWYsw37R+ 9z4UGjfGpc4yLct/1S7WXMPVe0AB2f99y+18JoNCXt6YiAwcIMfOpzQYHOeLjIFLtQn6 bgIChFz8ieA/3qdmAmcy6VCFXZSPaHezbMwDyUP4SftOU6lOQ5K7vhKfQOCggZPR2fBL cxsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=P8HbTIohzMyFeNHPHkBrMJXCJfjW5V4ojYQ6Qu8VudE=; b=fiJIbBxtB/dlBmzbWMlxbNOOUH/9op8PUMI4/pPinhxraBXw4zlWEgqlKLD094R+Yn t4o9s5GuMu+r7byDxuPQYf5QbB7ZoEsgmebJXjooVGQwQI3DlHb5qwODt8Z/cT2bX6hV YWCycnAYkxrUJ5S8qSNJbyV3vJepkckKlAS1z/hWkF4gJxe5RJ01bRTN7jsVM6wE4XDq Z1zdgNGHEkv7//hHc8m9bFeaPdzopfnvM4d2HoyEcTJxf8CD62iBhSLbF7jjp3tdl8Bi BrY++Jjmu6Q3kdX4uW2OzBfQCl2HAzap8ccctF+iV1dmmHjTnAD1MXhhTOvdUNVYi4ts BKKg== X-Gm-Message-State: APf1xPAGlyBthKE1jRM/yWqBGmSrTxKzC9dsaAi36UiDdB/kpoaFWrAn HZYFMHS8KxNiNBcoh2ujLechw/0ZUzlDV+92Mmo= X-Received: by 10.202.75.75 with SMTP id y72mr3583407oia.38.1518620216656; Wed, 14 Feb 2018 06:56:56 -0800 (PST) MIME-Version: 1.0 Received: by 10.168.66.10 with HTTP; Wed, 14 Feb 2018 06:56:55 -0800 (PST) In-Reply-To: References: From: Arnd Bergmann Date: Wed, 14 Feb 2018 15:56:56 +0100 X-Google-Sender-Auth: VRoeqFaYpcWJw-uaGIu9GHKIeBY Message-ID: Subject: Re: [PATCH v4 00/36] Andes(nds32) Linux Kernel To: Greentime Hu Cc: Greentime , Linux Kernel Mailing List , linux-arch , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Networking , Vincent Chen , DTML , Al Viro , David Howells , Will Deacon , Daniel Lezcano , linux-serial@vger.kernel.org, Geert Uytterhoeven , Linus Walleij , Mark Rutland , Greg KH , Guo Ren , Philippe Ombredanne , Stephen Rothwell Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Dec 18, 2017 at 7:46 AM, Greentime Hu wrote: > This is the 4th version patchset to add the Linux kernel port for Andes(nds32) > processors. Almost all of the feedbacks from v3 patchseries has been addressed. > Thanks to everyone who provided feedback on the previous version. > > > This patchset adds core architecture support to Linux for Andestech's > N13, N15, D15, N10, D10 processor cores. > > Based on the 16/32-bit AndeStar RISC-like architecture, we designed the > configurable AndesCore series of embedded processor families. AndesCores > range from highly performance-efficient small-footprint cores for > microcontrollers and deeply-embedded applications to 1GHz+ cores running > Linux, covering general-purpose N-series cores for a wide range of computing > need, DSP-capable D-series cores for digital signal control, > instruction-extensible E-series cores for application-specific acceleration, > and secure S-series cores for best protection of the most valuable. > > The patches are based on v4.14-rc8, and can also be found in the > following git tree: > https://github.com/andestech/linux.git nds32-4.14-rc8-v4 > > The build script and toolchain repositories are able to be found here: > https://github.com/andestech/build_script.git > > Freely available instruction set and architecture overview documents can > be found on the following page: > http://www.andestech.com/product.php?cls=9 > > > Vincent Ren-Wei Chen and I will maintain this port. Thanks to everyone who > helped us and contributed to it. :) Any feedback is welcome. Aside from the missing Ack on the sparc patch, everything looks good to get merged from my side this time. I would suggest as next steps: - ask Daniel to include the clocksource driver patches in his tree - Provide a git tree with all the patches you plan to send for inclusion, based on v4.16-rc1. - Add any further changes on top of that branch, without rebasing any further. - give Stephen the git URL for inclusion in linux-next Arnd