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[209.132.180.67]) by mx.google.com with ESMTP id b1-v6si1829438plc.260.2018.02.14.08.36.17; Wed, 14 Feb 2018 08:36:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1032695AbeBNQf0 (ORCPT + 99 others); Wed, 14 Feb 2018 11:35:26 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:4275 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1032656AbeBNQfE (ORCPT ); Wed, 14 Feb 2018 11:35:04 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Wed, 14 Feb 2018 08:35:11 -0800 Received: from HQMAIL106.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Wed, 14 Feb 2018 08:35:43 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Wed, 14 Feb 2018 08:35:43 -0800 Received: from HQMAIL112.nvidia.com (172.18.146.18) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 14 Feb 2018 16:35:03 +0000 Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL112.nvidia.com (172.18.146.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 14 Feb 2018 16:35:03 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server id 15.0.1347.2 via Frontend Transport; Wed, 14 Feb 2018 16:35:03 +0000 Received: from moonraker.nvidia.com (Not Verified[10.21.132.129]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Wed, 14 Feb 2018 08:35:02 -0800 From: Jon Hunter To: Mathias Nyman , Greg Kroah-Hartman , Thierry Reding CC: , , , Jon Hunter Subject: [PATCH 2/3] usb: xhci: tegra: Add runtime PM support Date: Wed, 14 Feb 2018 16:34:44 +0000 Message-ID: <1518626085-29102-2-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1518626085-29102-1-git-send-email-jonathanh@nvidia.com> References: <1518626085-29102-1-git-send-email-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add runtime PM support to the Tegra XHCI driver and move the function calls to enable/disable the clocks, regulators and PHY into the runtime PM callbacks. Signed-off-by: Jon Hunter --- drivers/usb/host/xhci-tegra.c | 80 ++++++++++++++++++++++++++++++------------- 1 file changed, 56 insertions(+), 24 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 02b0b24faa58..42aa67858b53 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -1067,22 +1068,12 @@ static int tegra_xusb_probe(struct platform_device *pdev) */ platform_set_drvdata(pdev, tegra); - err = tegra_xusb_clk_enable(tegra); - if (err) { - dev_err(&pdev->dev, "failed to enable clocks: %d\n", err); - goto put_usb2; - } - - err = regulator_bulk_enable(tegra->soc->num_supplies, tegra->supplies); - if (err) { - dev_err(&pdev->dev, "failed to enable regulators: %d\n", err); - goto disable_clk; - } + pm_runtime_enable(&pdev->dev); - err = tegra_xusb_phy_enable(tegra); + err = pm_runtime_get_sync(&pdev->dev); if (err < 0) { - dev_err(&pdev->dev, "failed to enable PHYs: %d\n", err); - goto disable_regulator; + dev_err(&pdev->dev, "failed to enable device: %d\n", err); + goto disable_rpm; } tegra_xusb_ipfs_config(tegra, regs); @@ -1090,7 +1081,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) err = tegra_xusb_load_firmware(tegra); if (err < 0) { dev_err(&pdev->dev, "failed to load firmware: %d\n", err); - goto disable_phy; + goto put_rpm; } tegra->hcd->regs = tegra->regs; @@ -1100,7 +1091,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) err = usb_add_hcd(tegra->hcd, tegra->xhci_irq, IRQF_SHARED); if (err < 0) { dev_err(&pdev->dev, "failed to add USB HCD: %d\n", err); - goto disable_phy; + goto put_rpm; } device_wakeup_enable(tegra->hcd->self.controller); @@ -1155,13 +1146,10 @@ static int tegra_xusb_probe(struct platform_device *pdev) usb_put_hcd(xhci->shared_hcd); remove_usb2: usb_remove_hcd(tegra->hcd); -disable_phy: - tegra_xusb_phy_disable(tegra); -disable_regulator: - regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); -disable_clk: - tegra_xusb_clk_disable(tegra); -put_usb2: +put_rpm: + pm_runtime_put_sync(&pdev->dev); +disable_rpm: + pm_runtime_disable(&pdev->dev); usb_put_hcd(tegra->hcd); put_padctl: tegra_xusb_padctl_put(tegra->padctl); @@ -1181,13 +1169,55 @@ static int tegra_xusb_remove(struct platform_device *pdev) dma_free_coherent(&pdev->dev, tegra->fw.size, tegra->fw.virt, tegra->fw.phys); + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + tegra_xusb_padctl_put(tegra->padctl); + + return 0; +} + +static int tegra_xusb_runtime_suspend(struct device *dev) +{ + struct tegra_xusb *tegra = dev_get_drvdata(dev); + tegra_xusb_phy_disable(tegra); regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); tegra_xusb_clk_disable(tegra); - tegra_xusb_padctl_put(tegra->padctl); + return 0; +} + +static int tegra_xusb_runtime_resume(struct device *dev) +{ + struct tegra_xusb *tegra = dev_get_drvdata(dev); + int err; + + err = tegra_xusb_clk_enable(tegra); + if (err) { + dev_err(dev, "failed to enable clocks: %d\n", err); + return err; + } + + err = regulator_bulk_enable(tegra->soc->num_supplies, tegra->supplies); + if (err) { + dev_err(dev, "failed to enable regulators: %d\n", err); + goto disable_clk; + } + + err = tegra_xusb_phy_enable(tegra); + if (err < 0) { + dev_err(dev, "failed to enable PHYs: %d\n", err); + goto disable_regulator; + } return 0; + +disable_regulator: + regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies); +disable_clk: + tegra_xusb_clk_disable(tegra); + return err; } #ifdef CONFIG_PM_SLEEP @@ -1211,6 +1241,8 @@ static int tegra_xusb_resume(struct device *dev) #endif static const struct dev_pm_ops tegra_xusb_pm_ops = { + SET_RUNTIME_PM_OPS(tegra_xusb_runtime_suspend, + tegra_xusb_runtime_resume, NULL) SET_SYSTEM_SLEEP_PM_OPS(tegra_xusb_suspend, tegra_xusb_resume) }; -- 2.7.4