Received: by 10.223.185.116 with SMTP id b49csp1026556wrg; Wed, 14 Feb 2018 10:26:01 -0800 (PST) X-Google-Smtp-Source: AH8x227KkkOLbJ+ROeW55NX96kFwlO0SAaYIx8Tel0vYtDEGXmkzjOFaJ48Wru2iArAaQ7B8G/oD X-Received: by 2002:a17:902:8496:: with SMTP id c22-v6mr71893plo.36.1518632761613; Wed, 14 Feb 2018 10:26:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518632761; cv=none; d=google.com; s=arc-20160816; b=vhOf6jiFhnsaFsu1Xi1gAfsXTqJqq6Q0YOEQujjI45LMuMveM/BcH9Rzytis2m7rMX NQClG+4eklz50nl8djuzyJu8jU6oElwwU1KsCnMl6zGk5cLD13XhaMKDDU2QzcGE0JSS +ZRvMEAQV7yl448dETDNr1Z+QUia375joJGWrF8Mf734D5RK5VxqoaIRHsFmbzfwjMKz xStHny12qBHufgBQtQOzfWMG5sjqG/vTS/HICcHntLYTEvu3Srtp4CqSDJxvp87GEy24 raMcUIrynyckU1Lgo2dQdxhUqJ5JiDnoOYTAFHjUSaytY4Jx/6PmD0HUd4yL2iQoAsuz OP6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=zFH5egBC9/Irv4eLJirb3feCAU0GDRo/lgrxB+Fi5NM=; b=JrEcpvzAirxQWRnbr0K8fViT8H5QEie4ymzzbT01UwVftTqfXO7MfOtuYzuWMgOANM u2HzqQrCgatpij2qw1pTHcLRo6M45PLKS3X7HTengvR9vriTcODYhKZ2Y/+GKt2UPpIu soFhGD1rfRzcqvFoc8CF85et8Bf7fPL0+d9jCzsKgmoO7KLldcOMC9W114FaXe77np8O 6oUl2F6PBrnq5FtIjsZe+9wXMHiUz9+hdQAhRo4r8rpm37lta0d2lXTSwRkHkMHO5Mb7 FM89J9qux/L9U1lR2RU3SqDYigEsEEjRmQmBgxhgExdBz/Nv95zp9Uw/9B6bhWm4Gn61 VmwA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c15-v6si1957356plk.327.2018.02.14.10.25.46; Wed, 14 Feb 2018 10:26:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161942AbeBNSYB (ORCPT + 99 others); Wed, 14 Feb 2018 13:24:01 -0500 Received: from isilmar-4.linta.de ([136.243.71.142]:48116 "EHLO isilmar-4.linta.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161834AbeBNSWe (ORCPT ); Wed, 14 Feb 2018 13:22:34 -0500 Received: from light.dominikbrodowski.net (isilmar.linta [10.0.0.1]) by isilmar-4.linta.de (Postfix) with ESMTPS id 8409E200903; Wed, 14 Feb 2018 18:22:33 +0000 (UTC) Received: by light.dominikbrodowski.net (Postfix, from userid 1000) id D346020BF1; Wed, 14 Feb 2018 19:22:13 +0100 (CET) From: Dominik Brodowski To: linux-kernel@vger.kernel.org, mingo@kernel.org, x86@kernel.org Cc: torvalds@linux-foundation.org, luto@kernel.org, ak@linux.intel.com, tglx@linutronix.de, dan.j.williams@intel.com Subject: [RFC PATCH 2/4] x86/entry/64: move ENTER_IRQ_STACK from interrupt macro to helper function Date: Wed, 14 Feb 2018 19:21:11 +0100 Message-Id: <20180214182113.27247-3-linux@dominikbrodowski.net> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180214182113.27247-1-linux@dominikbrodowski.net> References: <20180214182113.27247-1-linux@dominikbrodowski.net> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Moving the switch to IRQ stack from the interrupt macro to the helper function requires some trickery: All ENTER_IRQ_STACK really cares about is where the "original" stack -- meaning the GP registers etc. -- is stored. Therefore, we need to offset the stored RSP value by 8 whenever ENTER_IRQ_STACK is called from within a function. In such cases, and after switching to the IRQ stack, we need to push the "original" return address (i.e. the return address from the call to the interrupt entry function) to the IRQ stack. This trickery allows us to carve another 1k from the text size: text data bss dec hex filename 17905 0 0 17905 45f1 entry_64.o-orig 16897 0 0 16897 4201 entry_64.o Signed-off-by: Dominik Brodowski --- arch/x86/entry/entry_64.S | 53 +++++++++++++++++++++++++++++++---------------- 1 file changed, 35 insertions(+), 18 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index de8a0da0d347..3046b12a1acb 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -449,10 +449,18 @@ END(irq_entries_start) * * The invariant is that, if irq_count != -1, then the IRQ stack is in use. */ -.macro ENTER_IRQ_STACK regs=1 old_rsp +.macro ENTER_IRQ_STACK regs=1 old_rsp save_ret=0 DEBUG_ENTRY_ASSERT_IRQS_OFF movq %rsp, \old_rsp + .if \save_ret + /* + * If save_ret is set, the original stack contains one additional + * entry -- the return address. + */ + addq $8, \old_rsp + .endif + .if \regs UNWIND_HINT_REGS base=\old_rsp .endif @@ -497,6 +505,15 @@ END(irq_entries_start) .if \regs UNWIND_HINT_REGS indirect=1 .endif + + .if \save_ret + /* + * Push the return address to the stack. This return address can + * be found at the "real" original RSP, which was offset by 8 at + * the beginning of this macro. + */ + pushq -8(\old_rsp) + .endif .endm /* @@ -533,22 +550,7 @@ ENTRY(interrupt_helper) PUSH_AND_CLEAR_REGS save_ret=1 ENCODE_FRAME_POINTER 8 - ret -END(interrupt_helper) - -/* 0(%rsp): ~(interrupt number) */ - .macro interrupt func - cld - - testb $3, CS-ORIG_RAX(%rsp) - jz 1f - SWAPGS - call switch_to_thread_stack -1: - - call interrupt_helper - - testb $3, CS(%rsp) + testb $3, CS+8(%rsp) jz 1f /* @@ -566,10 +568,25 @@ END(interrupt_helper) CALL_enter_from_user_mode 1: - ENTER_IRQ_STACK old_rsp=%rdi + ENTER_IRQ_STACK old_rsp=%rdi save_ret=1 /* We entered an interrupt context - irqs are off: */ TRACE_IRQS_OFF + ret +END(interrupt_helper) + +/* 0(%rsp): ~(interrupt number) */ + .macro interrupt func + cld + + testb $3, CS-ORIG_RAX(%rsp) + jz 1f + SWAPGS + call switch_to_thread_stack +1: + + call interrupt_helper + call \func /* rdi points to pt_regs */ .endm -- 2.16.1