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[209.132.180.67]) by mx.google.com with ESMTP id p8si1369935pgn.769.2018.02.14.11.49.04; Wed, 14 Feb 2018 11:49:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=TO7mKoXU; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1163103AbeBNTsG (ORCPT + 99 others); Wed, 14 Feb 2018 14:48:06 -0500 Received: from mail-yw0-f177.google.com ([209.85.161.177]:41040 "EHLO mail-yw0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1163075AbeBNTsE (ORCPT ); Wed, 14 Feb 2018 14:48:04 -0500 Received: by mail-yw0-f177.google.com with SMTP id f12so6786269ywb.8 for ; Wed, 14 Feb 2018 11:48:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=3OUeKYYXPxHF4WumTY/Y6wi3FEfGukJc+RKYS3BcvQo=; b=TO7mKoXUEt2ONxonOOv5V5Dw2XEiPKa6lH0kYU0XRk0yCzKtJZfqtmp7wjNh7aKubn eulawTU2Tp3fXLrFuD+5a9aFQ+Q49xkZVdX24X7Xi1r5yLgky3j3VMt7cb7aiEKxEbhb oIQgTTA5OSyuapBKeVELWkRV1A668zmGTVA34P2t7Ziaa3bLxC6qlOuh2b6A25u/GKsy UZDPLJmPqS+lqn8xjrx9hhMaDmkJLw85tGVQgo0sOB2TuoOS91Ka79ml609yR3LAmjQH h3Uy8c1fumSROZltpfiXfKhSR/sqWnU/dQmcm9spMg9KQAQrXShLlrrmGlDPlduMXtBq zL/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=3OUeKYYXPxHF4WumTY/Y6wi3FEfGukJc+RKYS3BcvQo=; b=XDec8kNscYzWbTk0j197picxxCopzAkxb6s2v8LuyGUBZizfEdswgwH9yHXhreWzwb cHFF9XflHgI6hYh8ubEC+f/GYJ59sxjmDCrvYuIJvH+A3TWsoG9y6nGtxuWj2K84q9Gy NWajOy4F382qiSDizpLwxxTpotXWrbj7gX2z/OQb//ZhulhDgsG8An/34bPBOyBK/qJI wH84gr8fR24jFKIqq3TNT4hz9SxJQ8evutZmGq9HWh7gRZDZQ5YVkHvDro44btziH62U uzd4uKdeSjugb4Swd1Dj78ol8c627w/cH3l5RScfpdLPrL7JDJOqD9v/eeY4EgJktTQq QkDw== X-Gm-Message-State: APf1xPCVxOF/PIkEMELMbet+SJOiiA6U2EM7Sy0ALRMhtmEXFymihM2c gNQXrQuNSBLKL5H3q/EBrYzNK1kVeMZ3prtuqoo= X-Received: by 10.37.185.132 with SMTP id r4mr289217ybg.173.1518637683961; Wed, 14 Feb 2018 11:48:03 -0800 (PST) MIME-Version: 1.0 Received: by 2002:a25:6785:0:0:0:0:0 with HTTP; Wed, 14 Feb 2018 11:48:03 -0800 (PST) In-Reply-To: <3746a404-0811-0529-1e6a-faab5aaffe2e@amd.com> References: <1518619577-19771-1-git-send-email-clabbe@baylibre.com> <3746a404-0811-0529-1e6a-faab5aaffe2e@amd.com> From: Alex Deucher Date: Wed, 14 Feb 2018 14:48:03 -0500 Message-ID: Subject: Re: [PATCH v3 00/13] gpu: drm: amd: remove unused headers To: Tom St Denis Cc: Corentin Labbe , Chunming Zhou , Dave Airlie , "Deucher, Alexander" , Christian Koenig , amd-gfx list , Maling list - DRI developers , LKML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 14, 2018 at 2:35 PM, Tom St Denis wrote: > This will break umr since we source the headers from the kernel. The kernel > might not use them but the different IP blocks have deltas that umr is aware > of. > > One might argue that we should then publish the headers somewhere else that > is public but the kernel is our vehicle right now. > > Thoughts Alex/Christian? I also like having them there for debugging so I can use the defines for accessing registers and bitfields without having to look them up and add local defines or magic numbers. The non-register headers can be removed however since they are mostly leftover from code cleanups. Alex > > Tom > > > > On 14/02/18 09:46 AM, Corentin Labbe wrote: >> >> Hello >> >> This patchset remove several headers which are not used by any source >> file. >> >> Regards >> >> Change since v1: >> - splited in multiple patchs >> >> Change since v2 >> - Use --irreversible-delete for format-patch >> >> Corentin Labbe (13): >> drm/amd/include: remove unused asic_reg/oss headers >> drm/amd/include: remove unused asic_reg/bif headers >> drm/amd/include: remove unused asic_reg/dce headers >> drm/amd/include: remove unused asic_reg/gca headers >> drm/amd/include: remove unused asic_reg/gmc headers >> drm/amd/include: remove unused asic_reg/smu headers >> drm/amd/include: remove unused asic_reg/umc headers >> drm/amd/include: remove unused asic_reg/uvd headers >> drm/amd/include: remove unused asic_reg/vce headers >> drm/amd/include: remove unused asic_reg/sdma headers >> drm/amd/include: remove unused asic_reg/nbif headers >> drm/amd/include: remove unused displayobject.h header >> drm/amd/powerplay: remove unused headers >> >> .../drm/amd/include/asic_reg/bif/bif_5_0_enum.h | 1198 -- >> .../drm/amd/include/asic_reg/bif/bif_5_1_enum.h | 1068 - >> .../drm/amd/include/asic_reg/dce/dce_11_2_enum.h | 6813 ------ >> .../drm/amd/include/asic_reg/dce/dce_8_0_enum.h | 1117 - >> .../gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h | 2791 --- >> .../drm/amd/include/asic_reg/gca/gfx_8_1_enum.h | 6808 ------ >> .../drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h | 21368 >> ------------------- >> .../drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h | 1198 -- >> .../drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h | 1068 - >> .../amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h | 10281 --------- >> .../drm/amd/include/asic_reg/oss/oss_2_4_enum.h | 1340 -- >> .../drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h | 1464 -- >> .../drm/amd/include/asic_reg/oss/oss_3_0_enum.h | 1497 -- >> .../amd/include/asic_reg/sdma0/sdma0_4_0_default.h | 286 - >> .../amd/include/asic_reg/sdma1/sdma1_4_0_default.h | 282 - >> .../gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h | 148 - >> .../drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h | 715 - >> .../gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h | 1344 -- >> .../drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h | 1191 -- >> .../amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h | 5648 ----- >> .../drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h | 1205 -- >> .../drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h | 1246 -- >> .../drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h | 1282 -- >> .../drm/amd/include/asic_reg/smu/smu_8_0_enum.h | 1072 - >> .../drm/amd/include/asic_reg/umc/umc_6_0_default.h | 31 - >> .../drm/amd/include/asic_reg/umc/umc_6_0_offset.h | 52 - >> .../drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h | 795 - >> .../drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h | 1211 -- >> .../drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h | 1081 - >> .../gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h | 64 - >> .../drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h | 99 - >> drivers/gpu/drm/amd/include/displayobject.h | 249 - >> .../gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h | 412 - >> drivers/gpu/drm/amd/powerplay/inc/pp_feature.h | 67 - >> 34 files changed, 76491 deletions(-) >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_enum.h >> delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_sh_mask.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_default.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_default.h >> delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_d.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_default.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_offset.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_enum.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_enum.h >> delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h >> delete mode 100644 >> drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h >> delete mode 100644 drivers/gpu/drm/amd/include/displayobject.h >> delete mode 100644 drivers/gpu/drm/amd/powerplay/inc/polaris10_ppsmc.h >> delete mode 100644 drivers/gpu/drm/amd/powerplay/inc/pp_feature.h >> > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel