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[209.132.180.67]) by mx.google.com with ESMTP id e8si3138942pgr.63.2018.02.14.12.00.35; Wed, 14 Feb 2018 12:00:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OIKlBV5s; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031797AbeBNPtj (ORCPT + 99 others); Wed, 14 Feb 2018 10:49:39 -0500 Received: from mail-it0-f65.google.com ([209.85.214.65]:51312 "EHLO mail-it0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031788AbeBNPth (ORCPT ); Wed, 14 Feb 2018 10:49:37 -0500 Received: by mail-it0-f65.google.com with SMTP id 193so12897374iti.1 for ; Wed, 14 Feb 2018 07:49:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=rvSNiWBwsiKV1HqyhIwEptkxqdd45mfiRaN10rIOqmA=; b=OIKlBV5sZC2O24usaI653RMen9idyoXCVhFDzfNRFFKM3BiJoQ9R1H5vpQrAzaJA59 AuyAIBVrFOg6lGv/jm7eBjUU9Gxt/kSqpYmic4dNYNIhojA6bp/jYRa5YKX11yO9knOI FguiYJgIwRHATJf2g6ooDWUUiXS4OAjqIJVAA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=rvSNiWBwsiKV1HqyhIwEptkxqdd45mfiRaN10rIOqmA=; b=njhyBSg6fOxc0s3G7hKcDsSbqSonXtLySwTNuVAdIZxZJBIx+Hasgp6kh1iu1gH+/Q pK+ePtnKYeI2IBAhDDaU41BBpv6Z/lp0y3raIFsIy0vPSBSsUHBB2U5nNfqLBo1mupPj 2xvA/pDT9UqmyHWLgxB3EyNo3/tkmJoFaeZzXBbSjeoS71UubcFrFnaHHcyWfcupYSfu BswJPjwU9wJchjzES9u+OIfXPi7FGgJRKdccTEcogJrHojhshwQ8Oi2eGiWxHzdU5SO+ YbUywcvdklwMJioZnInFu6eAtxdzo5czrfcG1/byAZYaU75jGUqHkVOsQSKgN7hkjm3/ k95Q== X-Gm-Message-State: APf1xPAh3STCRax7G8IAwUzrDDWfOPuY+F6+aruw751NbEaj+ztMNMsY 4HEYgvE+YDLE10OJsrtuWS3JOYTGjtI0ZeAWzPsGMw== X-Received: by 10.36.216.65 with SMTP id b62mr6360642itg.17.1518623376676; Wed, 14 Feb 2018 07:49:36 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.112.13 with HTTP; Wed, 14 Feb 2018 07:49:36 -0800 (PST) In-Reply-To: <20180214154033.GA2745@kroah.com> References: <20180212113801.2552-1-ard.biesheuvel@linaro.org> <20180214135420.GB24189@kroah.com> <20180214154033.GA2745@kroah.com> From: Ard Biesheuvel Date: Wed, 14 Feb 2018 15:49:36 +0000 Message-ID: Subject: Re: [GIT PULL] arm64 spectre and meltdown mitigations for v4.14-stable To: Greg KH Cc: stable@vger.kernel.org, Linux Kernel Mailing List , Will Deacon , Catalin Marinas , Marc Zyngier , Mark Brown , linux-arm-kernel Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14 February 2018 at 15:40, Greg KH wrote: > On Wed, Feb 14, 2018 at 02:34:01PM +0000, Ard Biesheuvel wrote: >> On 14 February 2018 at 14:24, Ard Biesheuvel wrote: >> > On 14 February 2018 at 13:54, Greg KH wrote: >> >> On Mon, Feb 12, 2018 at 11:38:01AM +0000, Ard Biesheuvel wrote: >> >>> Hi Greg, >> >>> >> >>> As mentioned by Will, I have created the v4.14 counterpart of his stable >> >>> backport of the arm64/ARM Spectre/Meltdown mitigations that have been pulled >> >>> into v4.16-rc1. >> >>> >> >>> Given that this is the v4.15 version backported to v4.14, I have removed any >> >>> mention of 'conflicts' from the commit logs as they are now ambiguous. The >> >>> patches applied surprisingly cleanly, I only needed to drop two patches that >> >>> are already in (the same ones Will mentioned in his PR), and drop another one >> >>> dealing with SPE, support for which did not exist yet in v4.14. I also included >> >>> the patch >> >>> >> >>> arm64: move TASK_* definitions to >> >>> >> >>> from v4.15 to make Robin's Spectre v1 patches apply more cleanly. >> >> >> >> I've queued these up now, but if you could pull the whole quilt tree and >> >> verify I got things right, that would be great. There was some >> >> conflicts with a few previous patches I had already queued up that >> >> touched some "Falkor" errata code. >> >> >> >> Specifically 932b50c7c1c65e6f23002e075b97ee083c4a9e71 "arm64: Add >> >> software workaround for Falkor erratum 1041" is the offending patch. I >> >> think I resolved the merge issues properly, but verifying this would be >> >> wonderful. >> >> >> > >> > No, the build is broken now. I will investigate. >> >> Your patch 977c3d2cb684e143a18e1564fbf5ecf7576a1c98 >> >> arm64: Move post_ttbr_update_workaround to C code >> >> removes the pre_disable_mmu_workaround macro from asm/assembler.h but >> it should only remove post_ttbr_update_workaround >> >> Once I add that back, things seem to build and run as expected. > > Can you provide a "fixed" version of just this patch so I know to get it > correct? > Sure. I will send it in a separate email, or Gmail will clobber the patch.