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Date:   Wed, 14 Feb 2018 17:14:12 +0100
From:   Andrew Lunn <andrew@lunn.ch>
To:     Daniel Schultz <d.schultz@phytec.de>
Cc:     robh+dt@kernel.org, mark.rutland@arm.com, f.fainelli@gmail.com,
        netdev@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, w.egorov@phytec.de
Subject: Re: [PATCH v3 1/2] net: phy: dp83867: Add binding for the CLK_OUT
 pin muxing option
Message-ID: <20180214161412.GG12307@lunn.ch>
References: <1518624432-15110-1-git-send-email-d.schultz@phytec.de>
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On Wed, Feb 14, 2018 at 05:07:11PM +0100, Daniel Schultz wrote:
> From: Wadim Egorov <w.egorov@phytec.de>
> 
> The DP83867 has a muxing option for the CLK_OUT pin. It is possible
> to set CLK_OUT for different channels.
> Create a binding to select a specific clock for CLK_OUT pin.
> 
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew