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[209.132.180.67]) by mx.google.com with ESMTP id 71-v6si403681plf.371.2018.02.14.12.09.09; Wed, 14 Feb 2018 12:09:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1033209AbeBNRAt (ORCPT + 99 others); Wed, 14 Feb 2018 12:00:49 -0500 Received: from mail.kernel.org ([198.145.29.99]:46028 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1032961AbeBNRAr (ORCPT ); Wed, 14 Feb 2018 12:00:47 -0500 Received: from saruman (jahogan.plus.com [212.159.75.221]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3F5AB2177D; Wed, 14 Feb 2018 17:00:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3F5AB2177D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=jhogan@kernel.org Date: Wed, 14 Feb 2018 17:00:42 +0000 From: James Hogan To: Alexandre Belloni Cc: Ralf Baechle , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 6/8] MIPS: mscc: add ocelot PCB123 device tree Message-ID: <20180214170042.GE3986@saruman> References: <20180116101240.5393-1-alexandre.belloni@free-electrons.com> <20180116101240.5393-7-alexandre.belloni@free-electrons.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="hwvH6HDNit2nSK4j" Content-Disposition: inline In-Reply-To: <20180116101240.5393-7-alexandre.belloni@free-electrons.com> User-Agent: Mutt/1.7.2 (2016-11-26) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --hwvH6HDNit2nSK4j Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Jan 16, 2018 at 11:12:38AM +0100, Alexandre Belloni wrote: > Add a device tree for the Microsemi Ocelot PCB123 evaluation board. >=20 > Signed-off-by: Alexandre Belloni Please Cc DT folk. > diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts b/arch/mips/boot/d= ts/mscc/ocelot_pcb123.dts > new file mode 100644 > index 000000000000..42bd404471f6 > --- /dev/null > +++ b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts > @@ -0,0 +1,27 @@ > +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ > +/* Copyright (c) 2017 Microsemi Corporation */ > + > +/dts-v1/; > + > +#include "ocelot.dtsi" > + > +/ { > + compatible =3D "mscc,ocelot-pcb123", "mscc,ocelot"; Should mscc,ocelot-pcb123 be added to the mscc DT binding documentation in the other patch? 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