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[209.132.180.67]) by mx.google.com with ESMTP id 63si955955pgi.596.2018.02.15.00.21.56; Thu, 15 Feb 2018 00:22:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755071AbeBOIVS (ORCPT + 99 others); Thu, 15 Feb 2018 03:21:18 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:14383 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754879AbeBOIVO (ORCPT ); Thu, 15 Feb 2018 03:21:14 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1F8IYaW008197; Thu, 15 Feb 2018 09:20:41 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2g1q327t4n-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 15 Feb 2018 09:20:41 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 87BEC38; Thu, 15 Feb 2018 08:20:40 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5D10F2556; Thu, 15 Feb 2018 08:20:40 +0000 (GMT) Received: from SAFEX1HUBCAS24.st.com (10.75.90.94) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 15 Feb 2018 09:20:40 +0100 Received: from localhost (10.129.6.172) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 15 Feb 2018 09:20:39 +0100 From: Philippe Cornu To: Rob Herring , Mark Rutland , Russell King , Maxime Coquelin , Alexandre Torgue , , , CC: Benjamin Gaignard , Yannick Fertre , Philippe Cornu , "Vincent Abriou" Subject: [PATCH 1/3] ARM: dts: stm32: Add dt-bindings gpio.h include on stm32f469-disco Date: Thu, 15 Feb 2018 09:20:12 +0100 Message-ID: <20180215082014.30383-2-philippe.cornu@st.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180215082014.30383-1-philippe.cornu@st.com> References: <20180215082014.30383-1-philippe.cornu@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.129.6.172] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-02-15_03:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add dt-bindings/gpio/gpio.h include and use it on vcc5v_otg. Signed-off-by: Philippe Cornu --- arch/arm/boot/dts/stm32f469-disco.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/stm32f469-disco.dts b/arch/arm/boot/dts/stm32f469-disco.dts index bdd03ac7a4b5..7d53b794d27b 100644 --- a/arch/arm/boot/dts/stm32f469-disco.dts +++ b/arch/arm/boot/dts/stm32f469-disco.dts @@ -48,6 +48,7 @@ /dts-v1/; #include "stm32f429.dtsi" #include "stm32f469-pinctrl.dtsi" +#include / { model = "STMicroelectronics STM32F469i-DISCO board"; @@ -74,7 +75,7 @@ vcc5v_otg: vcc5v-otg-regulator { compatible = "regulator-fixed"; enable-active-high; - gpio = <&gpiob 2 0>; + gpio = <&gpiob 2 GPIO_ACTIVE_HIGH>; regulator-name = "vcc5_host1"; regulator-always-on; }; -- 2.15.1