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[209.132.180.67]) by mx.google.com with ESMTP id s10si21583pgp.43.2018.02.15.05.05.57; Thu, 15 Feb 2018 05:06:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1032635AbeBONE2 (ORCPT + 99 others); Thu, 15 Feb 2018 08:04:28 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:43122 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1031902AbeBONEA (ORCPT ); Thu, 15 Feb 2018 08:04:00 -0500 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1FCxV6M023280; Thu, 15 Feb 2018 14:03:28 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2g22s07bty-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 15 Feb 2018 14:03:28 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B086331; Thu, 15 Feb 2018 13:03:27 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 8B2874DFA; Thu, 15 Feb 2018 13:03:27 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 15 Feb 2018 14:03:27 +0100 Received: from localhost (10.201.23.65) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 15 Feb 2018 14:03:26 +0100 From: Lionel Debieve To: Matt Mackall , Herbert Xu , Arnd Bergmann , Greg Kroah-Hartman , Maxime Coquelin , Alexandre Torgue , Rob Herring , , , CC: Benjamin Gaignard , Ludovic Barre Subject: [PATCH Resend 4/5] dt-bindings: rng: add clock detection error for stm32 Date: Thu, 15 Feb 2018 14:03:11 +0100 Message-ID: <20180215130312.23612-5-lionel.debieve@st.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180215130312.23612-1-lionel.debieve@st.com> References: <20180215130312.23612-1-lionel.debieve@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.65] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-02-15_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add optional property to enable the clock detection error on rng block. It is used to allow slow clock source which give correct entropy for rng. Signed-off-by: Lionel Debieve --- Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.txt b/Documentation/devicetree/bindings/rng/st,stm32-rng.txt index cb7ca78135ff..1dfa7d51e006 100644 --- a/Documentation/devicetree/bindings/rng/st,stm32-rng.txt +++ b/Documentation/devicetree/bindings/rng/st,stm32-rng.txt @@ -13,6 +13,7 @@ Required properties: Optional properties: - resets : The reset to properly start RNG +- clock-error-detect : Enable the clock detection management Example: -- 2.15.1