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[209.132.180.67]) by mx.google.com with ESMTP id z96-v6si1266208plh.484.2018.02.15.05.06.46; Thu, 15 Feb 2018 05:07:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031826AbeBOND4 (ORCPT + 99 others); Thu, 15 Feb 2018 08:03:56 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:63230 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030561AbeBONDz (ORCPT ); Thu, 15 Feb 2018 08:03:55 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1FCwxgS008409; Thu, 15 Feb 2018 14:03:25 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2g1q329253-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 15 Feb 2018 14:03:25 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1E36C34; Thu, 15 Feb 2018 13:03:23 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id CBBBF4E31; Thu, 15 Feb 2018 13:03:23 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 15 Feb 2018 14:03:23 +0100 Received: from localhost (10.201.23.65) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Thu, 15 Feb 2018 14:03:23 +0100 From: Lionel Debieve To: Matt Mackall , Herbert Xu , Arnd Bergmann , Greg Kroah-Hartman , Maxime Coquelin , Alexandre Torgue , Rob Herring , , , CC: Benjamin Gaignard , Ludovic Barre Subject: [PATCH Resend 0/5] hwrng: stm32 - Improvement for stm32-rng Date: Thu, 15 Feb 2018 14:03:07 +0100 Message-ID: <20180215130312.23612-1-lionel.debieve@st.com> X-Mailer: git-send-email 2.15.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.65] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-02-15_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This set of patches add extended functionalities for stm32 rng driver. Patch #1 includes a reset during probe to avoid any error status which can occur during bootup process and keep safe rng integrity. Patch #3 adds a new property to manage the clock error detection feature which can be disabled on specific target. Patch #5 rework the timeout calculation for read value that was previously defined based on loop operation and is now based on timer. Lionel Debieve (5): hwrng: stm32 - add reset during probe dt-bindings: rng: add reset node for stm32 hwrng: stm32 - allow disable clock error detection dt-bindings: rng: add clock detection error for stm32 hwrng: stm32 - rework read timeout calculation .../devicetree/bindings/rng/st,stm32-rng.txt | 4 ++ drivers/char/hw_random/stm32-rng.c | 44 ++++++++++++++-------- 2 files changed, 32 insertions(+), 16 deletions(-) -- 2.15.1