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[209.132.180.67]) by mx.google.com with ESMTP id p129si2734373pga.134.2018.02.15.06.05.17; Thu, 15 Feb 2018 06:06:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=lqQ8OgG6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1033044AbeBOOEY (ORCPT + 99 others); Thu, 15 Feb 2018 09:04:24 -0500 Received: from galahad.ideasonboard.com ([185.26.127.97]:48505 "EHLO galahad.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1032283AbeBOOEW (ORCPT ); Thu, 15 Feb 2018 09:04:22 -0500 Received: from avalon.localnet (dfj612ybrt5fhg77mgycy-3.rev.dnainternet.fi [IPv6:2001:14ba:21f5:5b00:2e86:4862:ef6a:2804]) by galahad.ideasonboard.com (Postfix) with ESMTPSA id 7BE26200BF; Thu, 15 Feb 2018 15:02:47 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1518703367; bh=vvoIajGNZ8V+M9d9F00ZUuLS21jJBpU+Z7Cw/I/aaGw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lqQ8OgG6q/YtKK65BHom7KSS4xC95F5esnjgYz/3PqnEhZ6Jd0GoeSDIiOsMIgHgS EwVgEbMKbJfd5T0Mzrvk3aCt/r+pGV1oyycLy6+0Sex71b87axSMS9N2PbKL+fLN6/ 2uXJxFQT4ykaE8aoJPvdLRMo4pwlSjD/6mtehdnA= From: Laurent Pinchart To: Kieran Bingham Cc: Kieran Bingham , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Simon Horman , geert@glider.be, Kieran Bingham , David Airlie , Rob Herring , Mark Rutland , Laurent Pinchart , "open list:DRM DRIVERS" , open list Subject: Re: [PATCH 3/8] dt-bindings: display: renesas,lvds: Add LVDS binding for D3 Date: Thu, 15 Feb 2018 16:04:55 +0200 Message-ID: <3242490.rUUU4MHlpR@avalon> Organization: Ideas on Board Oy In-Reply-To: References: <1518683903-10681-1-git-send-email-kbingham@kernel.org> <1518683903-10681-4-git-send-email-kbingham@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Kieran, On Thursday, 15 February 2018 10:45:33 EET Kieran Bingham wrote: > On 15/02/18 08:38, Kieran Bingham wrote: > > From: Kieran Bingham > > > > The D3 supports two LVDS channels. Extend the binding to support them. > > > > Signed-off-by: Kieran Bingham > > --- > > > > Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git > > a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt > > b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt index > > 79860f58a7ad..0dcf488b70df 100644 > > --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt > > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt > > > > @@ -14,6 +14,7 @@ Required properties: > > - compatible : Shall contain one of > > - "renesas,lvds-r8a7795" for R8A7795 (R-Car H3) compatible LVDS > > encoders > > - "renesas,lvds-r8a7796" for R8A7796 (R-Car M3-W) compatible LVDS > > encoders > > + - "renesas,lvds-r8a77995" for R8A77995 (R-Car D3) compatible LVDS > > encoders > > Hi Laurent, > > Are we unable to have a generic lvds-gen3 here? > > (Although to perhaps answer my own question I see that the D3/E3 have extra > registers) > > Also "lets pretend" that I intentionally separated out the LVDS updates to > the rcar_lvds_of_table :) We could for H3 and M3-W, but as you've noticed D3/E3 differ, and so does V3M. > > - reg: Base address and length for the memory-mapped registers > > - clocks: A phandle + clock-specifier pair for the functional clock -- Regards, Laurent Pinchart